USB2602 SMSC Corporation, USB2602 Datasheet - Page 14

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USB2602

Manufacturer Part Number
USB2602
Description
(USB2601 / USB2602) 4th Generation USB2.0 Flash Media Controller
Manufacturer
SMSC Corporation
Datasheet

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Chapter 6 Pin Descriptions
Revision 1.5 (07-24-06)
6.1
USB Power Enable
Port Power Polarity
Detect Upstream
USB Bus Data
USB Bus Data
VBUS Power
Strapping
NAME
This section provides a detailed description of each signal. The signals are arranged in functional
groups according to their associated interface.
The “n” or “_N”symbol in the signal name indicates that the active, or asserted state occurs when the
signal is at a low voltage level. When “n” is not present before the signal name (or “_N” after the signal
name), the signal is asserted when at the high voltage level.
The terms assertion and negation are used exclusively. This is done to avoid confusion when working
with a mixture of “active low” and “active high” signal. The term assert, or assertion indicates that a
signal is active, independent of whether that level is represented by a high or low voltage. The term
negate, or negation indicates that a signal is inactive.
PIN Descriptions
PRTPWR_POL
PRTPWR[4:2]
USBUP_DM
USBDN_DM
USBDN_DP
USBUP_DP
VBUS_DET
SYMBOL
[4:2}
[4:2}
4th Generation USB2.0 Flash Media Controller with Integrated Card Power FETs and HS Hub
UPSTREAM USB INTERFACE
3-PORT USB INTERFACE
BUFFER
TYPE
I/O12
I/O12
I/O12
IO-U
IO-U
DATASHEET
14
These pins connect to the Upstream USB bus data
signals.
Detects state of Upstream VBUS power. The SMSC
Hub monitors VBUS_DET to determine when to assert
the internal D+ pull-up resistor (signalling a connect
event).
When designing a detachable hub, this pin must be
connected to the VBUS power pin of the USB port that
is upstream of the hub.
For self-powered applications with a permanently
attached host, this pin must be pulled-up to either 3.3V
or 5.0V (typically VDD33).
These pins connect to the Downstream USB bus data
signals.
Enables power to USB peripheral devices
(downstream).
The active signal level of the PRTPWR[4:2] pins is
determined by the Power Polarity Strapping function of
the PRTPWR_POL pin.
Port Power Polarity strapping determination for the
active signal polarity of the PRTPWR[4:2] pins.
While RESET_N is asserted, the logic state of this pin
will (though the use of internal combinatorial logic)
determine the active state of the PRTPWR[4:2] pins in
order to ensure that downstream port power is not
inadvertently enabled to inactive ports during a
hardware reset.
‘1’ = PRTPWR[4:2] pins have an active ‘high’ polarity
‘0’ = PRTPWR[4:2] pins have an active ‘low’ polarity
DESCRIPTION
SMSC USB2601/USB2602
Datasheet

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