USB3300 SMSC Corporation, USB3300 Datasheet - Page 38

• Manufacturer Part Number: USB3300
• Description: Hi-Speed USB Host
• Manufacturer: SMSC Corporation

Revision 1.06 (07-19-06)
6.1.10.1
6.1.11
6.2
6.2.1
6.2.2
tx_enable
SIGNAL
interrupt
data
se0
3pin FS/LS Serial Mode
Three pin serial mode utilizes the data bus pins for the serial functions shown in
Reset Pin
The reset input of the USB3300 may be asynchronously asserted and de-asserted so long as it is held
in the asserted state continuously for a duration greater than one clkout clock cycle. The reset input
may be asserted when the USB3300 clkout signal is not active (i.e. in the suspend state caused by
asserting the SuspendM bit) but reset must only be de-asserted when the USB3300 clkout signal is
active and the reset has been held asserted for a duration greater than one clkout clock cycle. No
other PHY digital input signals may change state for two clkout clock cycles after the de-assertion of
the reset signal.
The SMSC Hi-Speed USB 2.0 Transceiver consists of four blocks in the lower right corner of
Figure
High Speed and Full Speed Transceivers
The USB3300 transceiver meets all requirements in the USB 2.0 specification.
The receivers connect directly to the USB cable. This block contains a separate differential receiver
for HS and FS mode. Depending on the mode, the selected receiver provides the serial data stream
through the multiplexer to the RX Logic block. The FS mode section of the FS/HS RX block also
consists of a single-ended receiver on each of the data lines to determine the correct FS linestate. For
HS mode support, the FS/HS RX block contains a squelch circuit to insure that noise is never
interpreted as data.
The transmitters connect directly to the USB cable. The block contains a separate differential FS and
HS transmitter which receive encoded, bit stuffed, serialized data from the TX Logic block and transmit
it onto the USB cable.
Termination Resistors
The USB3300 transceiver fully integrates all of the USB termination resistors. The USB3300 includes
1.5kΩ pull-up resistors on both DP and DM and a 15kΩ pull-down resistor on both DP and DM. The
45Ω high speed termination resistors are also integrated. These resistors require no tuning or trimming
by the Link. The state of the resistors is determined by the operating mode of the PHY. The possible
valid resistor combinations are shown in
in the table below.
Hi-Speed USB Transceiver
CONNECTED
6.1. These four blocks are labeled HS XCVR, FS/LS XCVR, Resistors, and Bias Gen.
DATA[0]
DATA[1]
DATA[2]
DATA[3]
TO
Table 6.7 Pin Definitions in 3 pin Serial Mode
DIRECTION
OUT
I/O
I/O
IN
DATASHEET
Hi-Speed USB Host, Device or OTG PHY with ULPI Low Pin Interface
Table
Active High transmit enable
Tx differential data on DP/DM when tx_enable is high
RX differential data from DP/DM when tx_enable is low
Tx SE0 on DP/DM when tx_enable is high
RX SE0 from DP/DM when tx_enable is low
Asserted when any unmasked interrupt occurs. Active high
38
6.8. Operation is guaranteed in the configurations given
DESCRIPTION
Table
SMSC USB3300
6.7.
Datasheet