ADP3041 Analog Devices, ADP3041 Datasheet - Page 10

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ADP3041

Manufacturer Part Number
ADP3041
Description
TFT LCD Panel Power Module
Manufacturer
Analog Devices
Datasheet

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ADP3041
THEORY OF OPERATION
Switching Regulator
The ADP3041 is a boost converter driver that stores energy
from an input voltage in an inductor and delivers that energy,
augmented by the input, to a load at a higher output voltage. It
includes a voltage reference and an error amplifier to com-
pare some fraction of the load voltage to the reference and to
amplify any difference between them. The amplified error
signal is compared to a dynamic signal produced by an inter-
nal ramp generator incorporating switch current feedback. The
comparator output timing sets the duty ratio of a switch driv-
ing the inductor to maintain the desired output voltage.
Referring to Figure 1, a typical application powers both the IC
and the inductor from the same input voltage. The on-chip
MOSFET is driven on, pulling the SW pin close to PGND. The
resulting voltage across the inductor causes its current to increase
approximately linearly, with respect to time.
When the MOSFET switch is turned off, the inductor current
cannot drop to zero, and so this current drives the SW node
capacitance rapidly positive until the diode becomes forward
biased. The inductor current now begins to charge the load
capacitor, causing a slight increase in output voltage. Generally,
the load capacitor is made large enough that this increase is very
small during the time the switch is off. During this time, inductor
current is also delivered to the load. In steady state operation,
the inductor current exceeds the load current, and the excess is
what charges the load capacitor. The inductor current falls
during this time, though not necessarily to zero.
During the next cycle, initiated by the on-chip oscillator, the
switch is again turned on so that the inductor current is ramped
up again. The charge on the load capacitor provides load current
during that interval. The remainder of the chip is arranged to
control the duty ratio of the switch to maintain a chosen output
voltage despite changes in input voltage or load current.
The output voltage is scaled down by a resistor voltage divider
and presented to the g
the difference between an on-chip reference and the voltage at
the FB pin so as to bring them to balance. This is when the
output voltage equals the reference voltage multiplied by the
resistor voltage divider ratio.
The g
other input a positive-going ramp produced by the oscillator
and modified by the current sense amplifier. The MOSFET
switch is turned on as the modified ramp voltage rises. When
this voltage exceeds the output of the g
tor turns off the switch by resetting the flip-flop previously set
by the oscillator. The output of the flip-flop is buffered by a high
current driver, which turned on the MOSFET switch at the
beginning of the oscillator cycle.
In the steady state with constant load and input voltage, the
current in the inductor cycles around some average current
level. The increasing ramp of current depends on input voltage
and t
on the difference between the input and output voltage and t
the remainder of the cycle. For the peaks of these two ramps
1
m
, the switch-on time, while the decreasing ramp depends
amplifier drives an internal comparator, which has at its
m
amplifier. This amplifier operates on
m
amplifier, the compara-
2
,
–10–
to be equal and opposite to maintain steady state, one can say
that t
of resistance in the inductor and switch and the forward voltage
drop of the diode. From this equality one can derive t
V
gives us the switch duty ratio, t
output voltages.
In practice, the duty ratio needs to be slightly higher than this
calculation. Because of series resistance in the inductor and the
switch, the voltage across the actual inductance is somewhat less
than the applied V
our approximation by the amount of the diode forward voltage
drop. However, the feedback control within the ADP3041 adjusts
the duty ratio to maintain the output voltage. Changes in
load current and input voltage are also accommodated by the
feedback control.
Changes in load current alone require a change in duty ratio in
order to change the average inductor current. Once the inductor
current adapts to the new load current, the duty ratio should
return to nearly its original value, as one can see from the
duty cycle calculation, which depends on input and output
voltages but not on current. Increasing the switch duty ratio
initially reduces the output voltage until the average inductor
current increases enough to offset the reduction of the t
interval. By limiting the duty ratio, one can prevent this effect
from regeneratively increasing the duty ratio to 100%, which
would cause the output to fall and the switch current to rise
without limit. The duty ratio is limited to about 80% by the
design of the oscillator and an additional flip-flop reset.
A comparator compares the current sense amplifier output to a
factory set limit that resets the flip-flop, turning off the switch.
This prevents runaway or overload conditions from damaging
the switch and reflecting fault overloads back to the input. Of
course, the load is directly connected to the input by way of the
diode and inductor, so protection against short circuited loads
must be done at the power input.
The g
voltage accuracy and invariance with load and input voltage.
However, because it is a g
response to input signal voltages, its high frequency response
can be controlled by the compensation impedance. This permits
the high frequency gain of the g
the best compromise between speed of response and frequency
stability.
The stable closed-loop bandwidth of the system can be extended
by the current feedback shown. A signal representing the magni-
tude of the switch current is added to the ramp. This dynamically
reduces the duty ratio as the current in the inductor increases,
until the g
frequency stability.
Soft Start
The soft start pin can load the COMP pin, forcing a low duty
cycle when its voltage is low. A capacitor on SS initially holds
the pin low; however, a small internal current charges the
capacitor, causing SS to rise after SD goes high. As it rises,
IN
/V
1
OUT
m
× V
amplifier has high voltage gain to ensure the output
, where T is the period of a cycle, t
IN
m
will equal t
amplifier restores it, improving the closed-loop
IN
, and the actual output voltage is less than
2
× (V
m
amplifier with a specified current
OUT
m
1
/T, in terms of the input and
– V
amplifier to be optimized for
IN
), if we neglect the effect
1
+ t
2
. This result
1
/T = 1 –
REV. D
2

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