ADP3410 Analog Devices, ADP3410 Datasheet

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ADP3410

Manufacturer Part Number
ADP3410
Description
Dual MOSFET Driver with Bootstrapping
Manufacturer
Analog Devices
Datasheet

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a
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
GENERAL DESCRIPTION
The ADP3410 is a dual MOSFET driver optimized for driving
two N-channel FETs that are the two switches in the non-
isolated synchronous buck power converter topology. Each of
the drivers is capable of driving a 3000 pF load with a 20 ns
propagation delay and a 30 ns transition time. One of the drivers
can be bootstrapped, and is designed to handle the high-voltage
slew rate associated with “floating” high-side gate drivers. The
ADP3410 has several protection features: overlapping drive
prevention (ODP), undervoltage lockout (UVLO) with perform-
ance specified at very low VCC levels, and overvoltage protection
(OVP) that can be used to monitor either the input or output.
Additional features include: programmable transition delay, a
synchronous drive override control pin, a synchronous drive
status monitor and, in conjunction with exiting from the UVLO
mode, a V
load. The quiescent current, when the device is disabled, is less
than 10 A.
REV. 0
FEATURES
All-In-One Synchronous Buck Driver
One PWM Signal Generates Both Drives
Anticross-Conduction Protection Circuitry
Programmable Transition Delay
Synchronous Override Control
Undervoltage Lockout
Programmable Overvoltage Shutdown
V
Shutdown Quiescent Current < 10 A
APPLICATIONS
Mobile Computing CPU Core Power Converters
Multiphase Desktop CPU Supplies
Single-Supply Synchronous Buck Converters
Standard-to-Synchronous Converter Adaptations
CC
Good Signal Drives Auxiliary Circuits
CC
Good (VCCGD) signal capable of driving a 10 mA
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
CONTROLLER
DRVLSD
OVPSET
VCCGD
PGND
TO PWM
GND
VCC
DLY
SD
IN
1.2V
Figure 1. Typical Application Circuit
FUNCTIONAL BLOCK DIAGRAM
V
CC
World Wide Web Site: http://www.analog.com
SD
IN
DRVLSD
SRMON
OVPSET
DLY
GND
ADP3410
Dual MOSFET Driver
PROTECTION
with Bootstrapping
VCC
CONTROL
OVERLAP
5V
CIRCUIT
VCCGD
AND
PGND
DRVH
DRVL
BST
SW
4.4V
© Analog Devices, Inc., 1999
ADP3410
ADP3410
V
BATT
V
CC
BST
DRVH
SW
DRVL
SRMON
V
OUT

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