S1A0903X01-Q0R0 Samsung Electronics, S1A0903X01-Q0R0 Datasheet - Page 27

• Manufacturer Part Number: S1A0903X01-Q0R0
• Description: AM/FM 1 Chip Tuner with PLL
• Manufacturer: Samsung Electronics

AM/FM 1CHIP TUNER WITH PLL
PFD has to detect subtle phase error and makes phase error signal. There is a region that PFD doesn't make any
phase error pulse due to the propagation delay or other factors, which is called Deadzone.
(detailed in IX. Terminology)
State
VPD
VFC
VFR
DEADZONE
VA
VB
DZ[1]
differences of deadzone (in Figure. 10)
correction pulse which make Deadzone reduced.
0
0
1
1
DZ[1:0] = 0 mode : Even though PLL loop is locked, generate phase error pulse and phase error
DZ[1:0] = 1 mode : Same as Dz[1:0] = 0 mode, but a width of phase error correction pulse is relatively
narrower.
DZ[1:0] = 2 mode : Generate only phase error pulse but phase error correction pulse.
DZ[1:0] = 3 mode : Same as DZ[1:0] = 2 mode, but a width of phase error pulse is relatively narrower.
DZ[1:0] = 0 or 1
DZ[1:0] = 2 or 3
2
1
Excellent C/N characteristics
Sidebands may be created by reference frequency leakage
Sidebands may be created by low-frequency leakage due to the correction pulse envelope.
PLL loop stable
2
DZ[0]
0
1
0
1
1 2
1
MX2 path
2
A
b
a
a
a
Figure 11. Timing Diagram (DZ[1:0]=0)
3
2
3
MX4 path
2
3
a
b
c
d
2
3
2
PMOS / NMOS
3
off/off
off/off
on/on
on/on
2
3
2
3
DeadZone
2
++0
--0
+0
-0
3
2
3
remarks
S1A0903X01
2
(1)
(2)
(3)
(4)
3
t
t
t
t
t
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