OPA686 Burr-Brown, OPA686 Datasheet - Page 12

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OPA686

Manufacturer Part Number
OPA686
Description
Wideband / Low Noise / Voltage Feedback OPERATIONAL AMPLIFIER
Manufacturer
Burr-Brown
Datasheet

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Inserting high resistor values into Eq. 2 can quickly domi-
nate the total equivalent input referred noise. A 105 source
impedance on the non-inverting input will add a Johnson
voltage noise term equal to that of the amplifier itself. As a
simplifying constraint, set R
R
is the signal’s source impedance with another matching R
to ground on the non-inverting input). This results in Eq. 3,
where NG > 10 has been assumed to further simplify the
expression.
Equation 3
Evaluating this expression for R
equivalent input noise of 1.7nV/ Hz. Note that the NG has
dropped out of this expression. This is valid only for NG > 10
as will typically be required by stability considerations.
FREQUENCY RESPONSE CONTROL
Voltage feedback op amps exhibit decreasing closed-loop
bandwidth as the signal gain is increased. In theory, this
relationship is described by the Gain Bandwidth Product
(GBP) shown in the specifications. Ideally, dividing GBP by
the non-inverting signal gain (also called the Noise Gain, or
NG) will predict the closed-loop bandwidth. In practice, this
only holds true when the phase margin approaches 90 , as it
does in high gain configurations. At low gains (increased
feedback factor), most high speed amplifiers will exhibit a
more complex response with lower phase margin. The
OPA686 is compensated to give a maximally flat 2nd-order
Butterworth closed-loop response at a non-inverting gain of
+10 (Figure 1). This results in a typical gain of +10 band-
width of 250MHz, far exceeding that predicted by dividing
the 1600MHz GBP by 10. Increasing the gain will cause the
phase margin to approach 90 and the bandwidth to more
closely approach the predicted value of (GBP/NG). At a gain
of +40, the OPA686 will show the 40MHz bandwidth
predicted using the simple formula and the typical GBP of
1600MHz.
Inverting operation offers some interesting opportunities to
increase the available GBP. When the source impedance is
matched by the gain resistor (Figure 2), the signal gain is
(1+R
(1 + R
ing the minimum stable gain for inverting operation under
these condition to –12 and the equivalent GBP to 3.2GHz.
DRIVING CAPACITIVE LOADS
One of the most demanding and yet very common load
conditions for an op amp is capacitive loading. Often, the
capacitive load is the input of an A/D converter, including
additional external capacitance which may be recommended
to improve A/D linearity. A high speed, high open-loop gain
amplifier like the OPA686 can be very susceptible to de-
creased stability and closed-loop response peaking when a
S
/2 source impedance at the non-inverting input (where R
F
/R
F
/2R
G
E
) while the noise gain for bandwidth purposes is
G
N
). This cuts the noise gain almost in half, increas-
®
OPA686
E
NI
G
I
= R
B
R
S
S
S
= 50
in Eq. 2 and assume an
kT
will give a total
R
S
S
S
12
capacitive load is placed directly on the output pin. When
the amplifier’s open-loop output resistance is considered,
this capacitive load introduces an additional pole in the
signal path that can decrease the phase margin. Several
external solutions to this problem have been suggested.
When the primary considerations are frequency response
flatness, pulse response fidelity and/or distortion, the sim-
plest and most effective solution is to isolate the capacitive
load from the feedback loop by inserting a series isolation
resistor between the amplifier output and the capacitive
load. This does not eliminate the pole from the loop re-
sponse, but rather shifts it and adds a zero at a higher
frequency. The additional zero acts to cancel the phase lag
from the capacitive load pole, thus increasing the phase
margin and improving stability.
The Typical Performance Curves show the recommended
R
at the load. Parasitic capacitive loads greater than 2pF can
begin to degrade the performance of the OPA686. Long PC
board traces, unmatched cables, and connections to multiple
devices can easily cause this value to be exceeded. Always
consider this effect carefully, and add the recommended
series resistor as close as possible to the OPA686 output pin
(see Board Layout Guidelines).
The criterion for setting this R
bandwidth, flat frequency response at the load. For the
OPA686 operating in a gain of +10, the frequency response
at the output pin is very flat to begin with, allowing relatively
small values of R
signal gain is increased, the unloaded phase margin will also
increase. Driving capacitive loads at higher gains will re-
quire lower R
DISTORTION PERFORMANCE
The OPA686 is capable of delivering an exceptionally low
distortion signal at high frequencies over a wide range of
gains. The distortion plots in the Typical Performance Curves
show the typical distortion under a wide variety of condi-
tions. Most of these plots are limited to 110dB dynamic
range. The OPA686’s distortion, driving a 500
not rise above –90dBc until either the signal level exceeds
2.0Vp-p and/or the fundamental frequency exceeds 5MHz.
Distortion in the audio band is < –120dBc.
Generally, until the fundamental signal reaches very high
frequencies or powers, the 2nd harmonic will dominate the
distortion with negligible a 3rd harmonic component. Focus-
ing then on the 2nd harmonic, increasing the load impedance
improves distortion directly. Remember that the total load
includes the feedback network; in the non-inverting configu-
ration, this is sum of R
configuration, it is just R
output voltage swing increases harmonic distortion directly.
A 6dB increase in output swing will generally increase the
2nd harmonic 12dB and the 3rd harmonic 18dB. Increasing
the signal gain will also increase the 2nd harmonic distor-
tion. Again, a 6dB increase in gain will increase the 2nd and
3rd harmonic by approximately 6dB even with constant
S
vs Capacitive Load and the resulting frequency response
S
values than those shown for a gain of +10.
S
to be used for low capacitive loads. As the
F
F
+ R
(Figures 1 and 2). Increasing
G
S
, while in the inverting
resistor is a maximum
load does

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