OPAMP3EVB ON Semiconductor, OPAMP3EVB Datasheet - Page 6

• Manufacturer Part Number: OPAMP3EVB
• Description: Op Amp Evaluation Board Manual
• Manufacturer: ON Semiconductor

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Board Layout (NCS2540DTBEVB)
Figure 6 and 7 shows the board layout of the NCS2540DTBEVB device.
L1, L2, C1, C2, C3, C4, C5, C6, C7, C8, C11, C12, D6,
D7, R5, and R7 are for power supply noise suppression.
R3, R18, R27 are for input matching of 50 W trace.
R1, R2, R8, R9, R19, R20 are for monitoring the input
signal.
BNC Connector
BNC Connector
Scope
+IN3
+IN3
J7
J8
R19
R20
R27
Figure 5. NCS2540 Evaluation Board Schematic (continued)
Figure 6. Close Up of NCS2540DTBEVB Evaluation Board Layout
R24
http://onsemi.com
V
7
8
OPAMP3EVB
CC
+
−
JMP3
EN3
R26
9
6
V
10
EE
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R4, R6 R15, R7, R24, R26 are for feedback resistor
configuration.
C9, R10, R11, C10, R12, R13, C15, R21, R22 are for
different loading configurations of the op amp.
Jumper 1 is for the enable pin of the device. They can
be used to enable or disable the op amps.
C15
R21
R22
BNC Connector
Out3
J9