AD9957 Analog Devices, AD9957 Datasheet - Page 24

• Manufacturer Part Number: AD9957
• Description: 1 GSPS Quadrature Digital Upconverter
• Manufacturer: Analog Devices

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DataSheet
AD9957
REGISTER MAP AND DESCRIPTIONS
REGISTER MAP
DAC Control
Name (Serial
Auxilliary
Register 1
Register 2
Register 3
Address)
Function
Function
Function
Register
Register
Control
Control
(CFR2)
Control
(CFR3)
CFR1
(00h)
(01h)
(02h)
(03h)
4
U
.com
<31:24>
<23:16>
<31:24>
<23:16>
<31:24>
<23:16>
<31:24>
<23:16>
<15:8>
<15:8>
<15:8>
<15:8>
Range
<7:0>
<7:0>
<7:0>
<7:0>
Bit
BlackFin
Interface
Matched
External
Internal
Manual
Control
Latency
REFCLK
Update
IO Update Rate Control
Enable
Digital
Enable
(MSB)
Active
Active
Divider
Power
Down
Mode
Disable
RAM
OSK
Bit 7
Input
IO
DRV0<1:0>
OPEN
OPEN
Filter Enable
Inverse Sinc
DAC Power
BlackFin Bit
Assembler
Enable IO
Hold Last
Update
Down
Order
Clock
Value
Bit 6
Data
OPEN
Auto-Clear
Clear CCI
Black Fin
PDCLK
Control
Accum
Sample
Enable
Power
Down
Frame
Phase
Clock
Input
Error
Mask
Early
Bit 5
Sync
Sync
Rate
Rev. PrF | Page 24 of 38
N:<6:0>
RAM QDUC
Power Down
Data Format
ICP<2:0>
Evaluation
Aux DAC
OPEN
OPEN
OPEN
Bit4
FSC<7:0>
OPEN
OPEN
OPEN
OPEN
Clear Phase
Internal Profile Control
External
PDCLK
Accum
Enable
Power
OPEN
Down
Mode
Bit 3
OPEN
PRELIMINARY TECHNICAL DATA
Load ARR
PDCLK
update
Enable
Power
Down
OPEN
Invert
@ I/O
Clock
Auto
Bit 2
FM Gain
VCO SEL <2:0>
SDIO Input
TxEnable
QDUC Operating Mode
OPEN
Output
Shaped
Keying
Enable
Invert
Only
Bit 1
OPEN
Q First Data
Enable Sine
PLL Enable
Bit 0 (LSB)
LSB First
Effective
Output
Output
Shaped
Keying
Pairing
FTW
Read
Auto
Value OR
Default
Profile
3Fh
FFh
00h
00h
00h
00h
00h
40h
08h
20h
1Fh
40h
00h
00h
00h
00h