MAX1149 Maxim Integrated Products, MAX1149 Datasheet - Page 17

• Manufacturer Part Number: MAX1149
• Description: (MAX1146 - MAX1149) 14-Bit ADCs
• Manufacturer: Maxim Integrated Products

The device is considered idle when all the bits have been
clocked out or 18 zeros have been clocked in on DIN.
The falling edge of CS alone does not start a conver-
sion. The first logic high clocked into DIN with CS low is
interpreted as a start bit and defines the first bit of the
control byte. The device begins to track on the fifth
falling edge of SCLK after a start bit has been recog-
nized. A conversion starts on the eighth falling edge of
SCLK as the last bit of the control byte is being clocked
in. The start bit is defined as follows:
Figure 9. Internal Clock Mode Timing—24 Clocks/Conversion Timing
Figure 10. External Clock Mode— 18 Clocks/Conversion Timing
INPUT MUX
INPUT T/H
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SSTRB
INPUT MUX
INPUT T/H
DOUT
SCLK
DIN
CS
SSTRB
DOUT
SCLK
DIN
SET ACCORDING TO PREVIOUS CONTROL BYTE
CS
HIGH-Z
HIGH-Z
SET ACCORDING TO PREVIOUS
CONTROL BYTE
START SEL2
START SEL2
Applications Information
1
1
HOLD
______________________________________________________________________________________
SEL1 SEL0
SEL1 SEL0
TRACK
CB1
CB1
SGL/DIF UNI/BIP
SGL/DIF UNI/BIP
SET TO CB1
TRACK
t
PD1
ACQ
PD1
t
ACQ
PD0
PD0
8
8
1
t
Multichannel, True-Differential,
OPEN
CONV
Idle Mode
SET TO CB1
D13 D12
Start Bit
RESET TO CB1
9
4
t
CONV
D13 D12 D11 D10
10
HOLD
START SEL2
D5
11
D4
SEL1 SEL0
D3
1) The first high bit clocked into DIN with CS low any
or
2) The first high bit clocked into DIN after bit 5 of a
Toggling CS before the current conversion is complete
aborts the conversion and clears the output register.
The fastest the MAX1146–MAX1149 can run with CS held
low between conversions is 18 clocks per conversion.
Figures 10 and 11 show the serial-interface timing neces-
sary to perform a conversion every 18 SCLK cycles.
D2
CB2
HOLD
D9
time the converter is idle.
conversion in progress is clocked onto DOUT
(Figures 10 and 11).
SGL/DIF
D1
D8
16
UNI/BIP
D0
D7
TRACK
Serial, 14-Bit ADCs
t
ACQ
PD1
D6
PD0
18
D5
1
D4
D3
SET TO CB2
D13 D12
HOLD
D2
4
D1
10
D0
START SEL2
D5
24
11
D4
D3
SEL1 SEL0
TRACK
D2
SGL/DIF
D1
15
UNI/BIP
D0
HIGH-Z
17