MAX7000AFamily Altera Corporation, MAX7000AFamily Datasheet - Page 20

no-image

MAX7000AFamily

Manufacturer Part Number
MAX7000AFamily
Description
Max 7000a Programmable Logic Device Family
Manufacturer
Altera Corporation
Datasheet
MAX 7000A Programmable Logic Device Data Sheet
20
Figure 8
Figure 8. MAX 7000A JTAG Waveforms
Table 8
devices.
Note:
(1)
Captured
t
t
t
t
t
t
t
t
t
t
t
t
t
Symbol
Table 8. JTAG Timing Parameters & Values for MAX 7000A Devices
JCP
JCH
JCL
JPSU
JPH
JPCO
JPZX
JPXZ
JSSU
JSH
JSCO
JSZX
JSXZ
Driven
Signal
Signal
to Be
to Be
TMS
TDO
TCK
Timing parameters shown in this table apply for all specified VCCIO levels.
TDI
shows the JTAG timing parameters and values for MAX 7000A
shows timing information for the JTAG signals.
TCK clock period
TCK clock high time
TCK clock low time
JTAG port setup time
JTAG port hold time
JTAG port clock to output
JTAG port high impedance to valid output
JTAG port valid output to high impedance
Capture register setup time
Capture register hold time
Update register clock to output
Update register high impedance to valid output
Update register valid output to high impedance
t
JCH
t
t
JPZX
JSZX
t
JCP
t
JSSU
t
JCL
Parameter
t
JSH
t
t
JPCO
JSCO
t
JPSU
t
t
JSXZ
Altera Corporation
JPH
Min
100
50
50
45
20
45
20
t
Max
JPXZ
25
25
25
25
25
25
Note (1)
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

Related parts for MAX7000AFamily