MAX1270ACAI Maxim, MAX1270ACAI Datasheet - Page 15

• Manufacturer Part Number: MAX1270ACAI
• Description: Multirange / +5V / 8-Channel / Serial 12-Bit ADCs
• Manufacturer: Maxim

The internally trimmed 2.50V reference is amplified
through the REFADJ buffer to provide 4.096V at REF.
Bypass REF with a 4.7µF capacitor to AGND and
REFADJ with a 0.01µF capacitor to AGND (Figure 13a).
The internal reference voltage is adjustable to ±1.5%
(±65 LSBs) with the reference-adjust circuit of Figure 1.
To use the REF input directly, disable the internal buffer
by tying REFADJ to V
REFADJ input eliminates the need to buffer the refer-
ence externally. When a reference is applied at
REFADJ, bypass REFADJ with a 0.01µF capacitor to
AGND. Note that when an external reference is applied
at REFADJ, the voltage at REF is given by:
Figure 11. Internal Clock Mode—13 Clocks/Conversion Timing
Figure 12. Internal Clock Mode—16 Clocks/Conversion Timing
A/D STATE
DOUT
A/D STATE
SSTRB
SSTRB
SCLK
DOUT
SCLK
DIN
DIN
CS
CS
HIGH-Z
HIGH-Z
START
START SEL2 SEL1 SEL0
1
1
SEL2 SEL1 SEL0
IDLE
CONTROL BYTE Ø
CONTROL BYTE Ø
______________________________________________________________________________________
RNG
RNG
DD
ACQUISITION CONVERSION
BIP
ACQUISITION CONVERSION
BIP
PD1 PD0
(Figure 13b). Using the
PD1 PD0
16 SCLK
8
13 SCLK
8
HIGH-Z
External Reference
Internal Reference
D11 D10 D9
9
D11 D10 D9
9
D8
D8
RESULT Ø
D7
Multirange, +5V, 8-Channel,
D7
D6
RESULT Ø
START SEL2 SEL1 SEL0
D6 D5 D4
D5 D4
14
13 SCLK
16
CONTROL BYTE 1
START SEL2 SEL1 SEL0
D3
16
17
D3
16 SCLK
CONTROL BYTE 1
(Figure 13c). At REF and REFADJ, the input impedance
is a minimum of 10kΩ for DC currents. During conver-
sions, an external reference at REF must be able to deliv-
er 400µA DC load currents and must have an output
impedance of 10Ω or less. If the reference has higher
output impedance or is noisy, bypass REF with a 4.7µF
capacitor to AGND as close to the chip as possible.
With an external reference voltage of less than 4.096V
at REF or less than 2.5V at REFADJ, the increase in the
ratio of RMS noise to the LSB value (full-scale / 4096)
results in performance degradation (loss of effective
bits).
D2
RNG
D2
D1 D0
ACQUISITION CONVERSION
BIP
D1 D0
V
REF
PD1 PD0
RNG
ACQUISITION CONVERSION
BIP
= 1.6384 x V
Serial 12-Bit ADCs
PD1 PD0
24
HIGH-Z
D11
22
D10
D11
REFADJ
25
D10
D9
24
D9
D8
RESULT 1
(2.4 < V
D8
D7
RESULT 1
START
D7
CONTROL BYTE 2
D6
SEL2
D6
D5
REF
D5
SEL1
D4
D4
SEL0
32
D3
< 4.18)
CB 2
START
D3
15