MAX13326 Maxim Integrated Products, MAX13326 Datasheet - Page 17

• Manufacturer Part Number: MAX13326
• Description: Dual Automotive Audio Line Drivers
• Manufacturer: Maxim Integrated Products

The acknowledge (ACK) bit is a clocked 9th bit that
the MAX13325/MAX13326 use to handshake receipt of
each byte of data when in write mode. The MAX13325/
MAX13326 pull down SDA during the entire master-
generated 9th clock pulse if the previous byte is suc-
cessfully received (see Figure 4). Monitoring ACK
allows for detection of unsuccessful data transfers. An
unsuccessful data transfer occurs if a receiving device
is busy or if a system fault has occurred. In the event
of an unsuccessful data transfer, the bus master may
retry communication. The master must pull down SDA
during the 9th clock cycle to acknowledge receipt of
data when the MAX13325/MAX13326 are in read mode.
An acknowledge must be sent by the master after each
Figure 4. Acknowledge and Not-Acknowledge Bits
Table 18. Slave Address
ADD1
GND
GND
SCL
SDA
V
V
V
V
L
L
L
L
ADD0
GND
GND
SDA
SCL
V
V
V
V
L
L
L
L
______________________________________________________________________________________
A6
—
1
1
1
1
1
1
1
SDA
SCL
A5
—
Dual Automotive, Audio Line Drivers
1
1
1
1
1
1
1
A4
—
0
0
0
0
0
0
0
Acknowledge Bit
with I
S
A3
—
0
0
0
0
0
0
0
A2
1
—
0
0
0
1
1
1
1
2
C Control and Diagnostic
A1
—
0
1
1
0
0
1
1
read byte to allow data transfer to continue. A not-
acknowledge is sent when the master reads the final
byte of data from the MAX13325/MAX13326, followed by
a STOP condition.
The MAX13325/MAX13326 are programmable to one of
seven I
unique device IDs. Connect ADD_ to GND, V
SDA to set the I
as the seven most significant bits (MSBs) followed by
the read/write bit. Set the read/write bit to 1 to configure
the MAX13325/MAX13326 to read mode. Set the read/
write bit to 0 to configure the device to write mode. The
address is the first byte of information sent after the
START condition.
A0
—
1
0
1
0
1
0
1
NOT ACKNOWLEDGE
ACKNOWLEDGE
2
C slave addresses. These slave addresses are
8
R/W
1/0
1/0
1/0
1/0
1/0
1/0
1/0
—
2
C slave address. The address is defined
9
ADDRESS
SLAVE
READ
(HEX)
0xCD
0xCB
0xC3
0xC5
0xC7
0xC9
0xCF
—
ADDRESS
SLAVE
WRITE
(HEX)
0xCA
0xCC
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0xC2
0xC4
0xC6
0xC8
0xCE
—
Slave Address
L
MODE
Stand-
, SCL, or
alone
I
I
I
I
I
I
I
2
2
2
2
2
2
2
C
C
C
C
C
C
C
17