MAX1396 Maxim Integrated Products, MAX1396 Datasheet - Page 11

• Manufacturer Part Number: MAX1396
• Description: (MAX1393 / MAX1396) 1-Channel True-Differential/ 2-Channel Single-Ended
• Manufacturer: Maxim Integrated Products

1.5V to 3.6V, 312.5ksps, 1-Channel True-Differential/
The ADC automatically powers down on the SCLK
falling edge that clocks out the LSB. This is the falling
edge after the 15th SCLK. DOUT goes low when the
LSB has been clocked into the master (µC) on the 16th
rising SCLK edge.
Alternatively, drive OE high to force the MAX1393/
MAX1396 into power-down. Whenever OE goes high,
the ADC powers down and disables DOUT regardless
of CS, SCLK, or the state of the ADC. DOUT enters a
high-impedance state after t
The MAX1393/MAX1396 use an external reference
between 0.6V and (V
Figure 7. Common Serial-Interface Connections to the
MAX1393/MAX1396
a) SPI
b) QSPI
c) MICROWIRE
MISO
MISO
SCK
SCK
I/O
I/O
CS
I/O
I/O
I/O
SK
______________________________________________________________________________________
SI
2-Channel Single-Ended, 12-Bit, SAR ADCs
DD
+ 50mV). Bypass REF with a
DOD
AutoShutdown Mode
External Reference
OE
CS
SCLK
DOUT
UNI/BIP
(CH1/CH2)*
OE
CS
SCLK
DOUT
UNI/BIP
(CH1/CH2)*
OE
CS
SCLK
DOUT
UNI/BIP
(CH1/CH2)*
.
*INDICATES THE MAX1396
MAX1393
MAX1396
MAX1393
MAX1396
MAX1393
MAX1396
0.1µF capacitor to GND for best performance (see the
Typical Operating Circuit).
The MAX1393/MAX1396 serial interface is fully compati-
ble with SPI, QSPI, and MICROWIRE (see Figure 7). If a
serial interface is available, set the µC’s serial interface
in master mode so the µC generates the serial clock.
Choose a clock frequency between 100kHz and 5MHz.
CS and OE can be connected together and driven
simultaneously. OE can also be connected to GND if the
DOUT bus is not shared and driven independently.
When using SPI or MICROWIRE, make the µC the bus
master and set CPOL = 0 and CPHA = 0 or CPOL = 1
and CPHA = 1. (These are the bits in the SPI or
MICROWIRE control register.) Two consecutive 1-byte
reads are required to get the entire 12-bit result from
the ADC. DOUT transitions on SCLK’s falling edge and
is clocked into the µC on the SCLK’s rising edge. See
Figure 7 for connections and Figures 8 and 9 for timing
diagrams. The conversion result contains 4 zeros, fol-
lowed by the 12 data bits with the data in MSB-first for-
mat. When using CPOL = 0 and CPHA = 0 or CPOL = 1
and CPHA = 1, the MSB of the data is clocked into the
µC on the SCLK’s fifth rising edge. To be compatible
with SPI and MICROWIRE, connect CS and OE togeth-
er and drive simultaneously.
Unlike SPI, which requires two 1-byte reads to acquire
the 12 bits of data from the ADC, QSPI allows the mini-
mum number of clock cycles necessary to clock in the
data. However, the MAX1393/MAX1396 require 16
clock cycles from the µC to clock out the 12 bits of
data. See Figure 7 for connections and Figures 8 and 9
for timing diagrams. The conversion result contains 4
zeros, followed by the 12 data bits with the data in
MSB-first format. When using CPOL = 0 and CPHA = 0
or CPOL = 1 and CPHA = 1, the MSB of the data is
clocked into the µC on the SCLK’s fifth rising edge. To
be compatible with QSPI, connect CS and OE together
and drive simultaneously.
Figure 10 shows the timing for DSP operation. Figure
11 shows the connections between the MAX1393/
MAX1396 and several common DSPs.
SPI and MICROWIRE
Serial Interface
DSP Interface
QSPI
11