MAX1535 Maxim Integrated Products, MAX1535 Datasheet - Page 33

• Manufacturer Part Number: MAX1535
• Description: Highly Integrated Level 2 Smbus Battery Charger
• Manufacturer: Maxim Integrated Products

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the lowest possible on-resistance (R
a moderate-sized package (i.e., one or two 8-pin SO,
DPAK, or D
that the DLO gate driver can supply sufficient current to
support the gate charge and the current injected into
the parasitic gate-to-drain capacitor caused by the
high-side MOSFET turning on; otherwise, cross-con-
duction problems can occur.
Since the MAX1535 utilizes P-channel high-side and N-
channel low-side MOSFETs, the switching characteris-
tics can be quite different. Select devices that have
short turn-off times, and make sure that P1(t
- N1(t
efficiency-killing shoot-through currents. If delay mis-
match causes shoot-through currents, consider adding
capacitance from gate to source on N1 to slow down its
turn-on time.
Worst-case conduction losses occur at the duty factor
extremes. For the high-side MOSFET, the worst-case
power dissipation (PD) due to resistance occurs at the
minimum supply voltage:
Generally, a small high-side MOSFET is desired to
reduce switching losses at high input voltages.
However, the R
power-dissipation limits often limits how small the MOS-
FET can be. The optimum occurs when the switching
(AC) losses equal the conduction (R
High-side switching losses do not usually become an
issue until the input is greater than approximately 15V.
Calculating the power dissipation in P1 due to switch-
ing losses is difficult since it must allow for difficult
quantifying factors that influence the turn-on and turn-
off times. These factors include the internal gate resis-
tance, gate charge, threshold voltage, source
inductance, and PC board layout characteristics. The
following switching-loss calculation provides only a
very rough estimate and is no substitute for breadboard
evaluation, preferably including a verification using a
thermocouple mounted on P1:
where C
and I
(4.5A sourcing and 1.1A sinking).
PD HS SWITCHING
(
PD HIGH SIDE
GATE
DON(MIN)
_
(
RSS
2
is the peak gate-drive source/sink current
PAK), and is reasonably priced. Make sure
is the reverse transfer capacitance of P1,
-
) < 40ns. Failure to do so may result in
DS(ON)
)
______________________________________________________________________________________
=
)
=
MOSFET Power Dissipation
V
DCIN MAX



V
required to stay within package
V
BATT
DCIN
(
)



2



I
×
LOAD
2
C
2
×
RSS
I
Highly Integrated Level 2 SMBus
GATE
DS(ON)

 ×

2
DS(ON)
×
f
R
SW
DS ON
), comes in
DOFF(MAX)
(
×
) losses.
I
LOAD
)
)
Switching losses in the high-side MOSFET can become
an insidious heat problem when maximum AC adapter
voltages are applied due to the squared term in the C x
V
MOSFET chosen for adequate R
voltages becomes extraordinarily hot when biased from
V
lower parasitic capacitance.
For the low-side MOSFET (N1), the worst-case power
dissipation always occurs at maximum input voltage:
Choose a Schottky diode (D1, Figure 1) having a for-
ward voltage low enough to prevent the N1 MOSFET
body diode from turning on during the dead time. As a
general rule, a diode having a DC current rating equal
to 1/3 of the load current is sufficient. This diode is
optional and can be removed if efficiency is not critical.
The charge current, ripple, and operating frequency
(off-time) determine the inductor characteristics.
Inductor L1 must have a saturation current rating of at
least the maximum charge current plus 1/2 of the ripple
current (∆IL):
The ripple current is determined by:
If V
or:
Figure 16 illustrates the variation of the ripple current
vs. battery voltage when the circuit is charging at 3A
with a fixed input voltage of 19V.
Higher inductor values decrease the ripple current.
Smaller inductor values require high-saturation current
capabilities and degrade efficiency. Designs that set
LIR = ∆IL / I
between inductor size and efficiency:
DCIN
IN(MAX)
PD LOW SIDE
BATT
(
2
x f
< 0.88V
, consider choosing another MOSFET with
t
t
OFF
OFF
SW
-
CHG
= 2.5µs (V
switching-loss equation. If the high-side
= 0.3µs for V
I
DCIN
Battery Charger
∆IL = V
SAT
)
= 0.3 usually result in a good balance
=
L




1
=
= I
, then:
-
V



CHG
BATT
BATT
LIR
V
V
DCIN
BATT
DCIN
BATT
×
+ (1/2) ∆IL
× t
- V
×



I
Inductor Selection
CHG




OFF
BATT
> 0.88 V



t
OFF
DS(ON)
I
LOAD
/ L
2
) / V

 ×

DCIN
2
DCIN
at low-battery
R
DS ON
(
)
33