ATA6824 ATMEL Corporation, ATA6824 Datasheet - Page 8

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ATA6824

Manufacturer Part Number
ATA6824
Description
High Temperature H-bridge Motor Driver
Manufacturer
ATMEL Corporation
Datasheet

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5.4
5.4.1
8
High Voltage Serial Interface
ATA6824 [Preliminary]
Transmit Mode
If triggering fails, /RESET will be pulled to ground for a shortened reset time of typically 2 ms.
The watchdog start sequence is similar to the power-on reset.
The internal oscillator is trimmed to a tolerance of < ±10%. This means that t
vary by ±10%. The following calculation shows the worst case calculation of the watchdog
period T
t
t
T
T
T
Figure 5-2 on page 7
external resistor R
A reset will be active for V
A bi-directional bus interface is implemented for data transfer between hostcontroller and the
local microcontroller (SIO).
The transceiver consists of a low side driver (1.2V at 40 mA) with slew rate control, wave shap-
ing, current limitation, and a high-voltage comparator followed by a debouncing unit in the
receiver.
During transmission, the data at the pin TX will be transferred to the bus driver to generate a bus
signal on pin SIO.
To minimize the electromagnetic emission of the bus line, the bus driver has an integrated slew
rate control and wave-shaping unit. Transmission will be interrupted in the following cases:
1min
2min
wdmax
wdmin
wd
• Thermal shutdown active or overtemperature SIO active
= 16.42 ms ±3.15 ms (±19.1%)
= 0.90
= 0.90
= t
= t
wd
1max
1min
which the microcontroller has to provide.
+ t
= 13.28 ms
t
t
1
2
= 10.87 ms, t
= 8.65ms, t
2min
OSC
= 10.87 ms + 8.65 ms = 19.52 ms
.
shows the typical watchdog period T
CC
2max
< V
1max
= 1.10
tHRESx
= 1.10
; the level V
t
2
t
= 10.57 ms
1
= 13.28 ms
tHRESx
is realized with a hysteresis (HYS
WD
depending on the value of the
1
and t
4931C–AUTO–09/06
2
can also
RESth
).

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