ATA8743 ATMEL Corporation, ATA8743 Datasheet - Page 106

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ATA8743

Manufacturer Part Number
ATA8743
Description
Manufacturer
ATMEL Corporation
Datasheet
• Bit 0– TOV0: Timer/Counter0 Overflow Flag
The bit TOV0 is set when an overflow occurs in Timer/Counter0. TOV0 is cleared by hardware
when executing the corresponding interrupt handling vector. Alternatively, TOV0 is cleared by
writing a logic one to the flag. When the SREG I-bit, TOIE0 (Timer/Counter0 Overflow Interrupt
Enable), and TOV0 are set, the Timer/Counter0 Overflow interrupt is executed.
The setting of this flag is dependent of the WGM02:0 bit setting. See
Table 20-8 on page 102
and
“Waveform Generation Mode Bit Description” on page
102.
ATA8743
106
9152A–INDCO–07/09

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