MAX1775 Maxim, MAX1775 Datasheet - Page 13

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MAX1775

Manufacturer Part Number
MAX1775
Description
Dual-Output Step-Down DC-DC Converter for PDA/Palmtop Computers
Manufacturer
Maxim
Datasheet

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To improve efficiency and conserve board space, the
core regulator operates from low input voltages, taking
advantage of internal low-voltage, low-on-resistance
MOSFETs. When the input voltage remains below 5.5V,
run the core converter directly from the input by con-
necting INC to IN (Figure 1). This configuration takes
advantage of the core’s low-voltage design and
improves efficiency.
For input voltages greater than 5.5V, cascade the main
and core converters by connecting INC to the main out-
put voltage. In this configuration (Figure 4), the core
converter is powered from the main output. Ensure that
the main output can simultaneously supply its load and
the core input current. In this configuration, the main
output voltage must be set above the 2.6V minimum
input voltage of the core converter.
The main output voltage may be set from +2.6V and
+5.5V with two external resistors connected as a volt-
Figure 4. High Input Voltage Cascaded Configuration
DC-DC Converter for PDA/Palmtop Computers
______________________________________________________________________________________
Setting the Output Voltages
High-Voltage Configuration
Low-Voltage Configuration
Design Procedure
0.22µF
ON
ON
1µF
C2
C3
OFF
OFF
14
1
2
5
9
3
CVL
REF
PGND
GND
SHDNM
SHDNC
MAX1775
IN 2.7V TO 28V
6
IN
CVH
PDRV
NDRV
FBM
CS+
LXC
FBC
CS-
INC
8
C1
1µF
7
11
12
15
10
16
13
4
M1
M2
5.4µH
L
Dual-Output Step-Down
C
age-divider to FBM (Figure 1). Resistor values can be
calculated by the following equation:
where V
The core regulator output is adjustable from +1.0V to
+5.0V through two external resistors connected as a
voltage-divider to FBC (Figure 1). Resistor values can
be calculated through the following equation:
where V
The main regulator current limit is set externally through
a small current-sense resistor, R1 (Figure 1). The value
of R1 can be calculated by the following equation:
where V
and I
core converter current limit is set internally and cannot
be modified.
R4
R5
10µH
L
OUT
M
FBM
FBC
CLM
C6
10µF
is the current delivered to the output. The
R2 = R3
R4 = R5
= +1.0V. Choose R5 to be 30kΩ or less.
= +1.25V. Choose R3 to be 40kΩ or less.
33mΩ
C5
22µF
= 80mV is the current-sense threshold,
R1
CORE
1.8V
1.5A
R
1
[(V
=
[(V
Setting the Current Limit
(
1 3
OUTM
OUTC
.
R2
R3
V
CLM
I
OUT
/ V
/ V
MAIN
3.3V
2A
C4
47µF
)
FBM
FBC
) - 1]
) - 1]
13

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