WM8146 Wolfson Microelectronics Ltd., WM8146 Datasheet - Page 10

• Manufacturer Part Number: WM8146
• Description: 12-bit ( 8+4-bit ) Linear Sensor Image Processor
• Manufacturer: Wolfson Microelectronics Ltd.

WM8146
DIGITAL CONTROL AND I/O FUNCTIONS
CONTROL INTERFACE
TIMING REQUIREMENTS
WOLFSON MICROELECTRONICS LTD
DIGITAL POLARITY ADJUST
The polarity of the digital output may be inverted by control bit INVOP. If INVOP=0, negative-going
input video will give negative-going digital output. If INVOP=1, negative-going video will give positive-
going digital output.
D
D
OUTPUT DATA
Data appears on the pins OP[7:0] and changes after every negative-going MCLK edge, as shown in
Figure 9 .
Figure 9 WM8146 Output Timing
A = d11, d10, d9, d8, d7, d6, d5, d4
B = d3, d2, d1, d0, 0, CC[1], CC[0], OVRNG
Where
CC1/CC0: These bits show from which channel the current output was taken. 00 = RED,
01 = GREEN, 10 = BLUE.
OVRNG: This bit indicates if the current output pixel has exceeded the maximum or minimum range
during processing. 1 = out of range, 0 = within range.
The internal control registers are programmable via the serial digital control interface.
REGISTER WRITE
The serial interface involves three dedicated pins, SCK, SDI, SEN (refer to Figure 10). A six-bit
address is clocked in through SDI MSB first followed by an eight-bit data word, also MSB first. Each
bit is latched on the rising edge of SCK. Once the data has been shifted into the device, a pulse is
applied to SEN to transfer the data to the appropriate internal register. Note all valid registers have
address bit a4 equal to 0.
Figure 10 Register Write Timing
To use this device a master clock (MCLK) of up to 12MHz and a per-pixel synchronisation clock
(VSMP) of up to 6MHz are required. These clocks drive a timing control block, which produces
2
2
= D
= 4095 – D
OP[7:0]
M C L K
1
SCK
SEN
SDI
1
…
a 5
…
(INVOP=0)
(INVOP=1)
0
Address
a 3
a 2
a 1
t
a 0
P D
A
b 7
Pin OP[7] to OP[0]
Pin OP[7] to OP[0]
b 6
b 5
Data Word
B
b 4
b 3
b 2
b 1
PP Rev 1.1 January 2000
b 0
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