MAX5064 Maxim Integrated Products, MAX5064 Datasheet - Page 10

• Manufacturer Part Number: MAX5064
• Description: (MAX5062 - MAX5064) Half-Bridge MOSFET Drivers
• Manufacturer: Maxim Integrated Products

Both the high- and low-side drivers feature undervolt-
age lockout (UVLO). The low-side driver’s UVLO
threshold is referenced to GND and pulls both driver
outputs low when V
driver has its own undervoltage lockout threshold
(UVLO
BST falls below 6.4V with respect to HS.
During turn-on, once V
old, DL starts switching and follows the IN_L logic input.
At this time, the bootstrap capacitor is not charged and
the BST-to-HS voltage is below UVLO
nous buck and half-bridge converter topologies, the
bootstrap capacitor can charge up in one cycle and
normal operation begins in a few microseconds after the
BST-to-HS voltage exceeds UVLO
forward topology, the BST capacitor takes some time (a
few hundred microseconds) to charge and increase its
voltage above UVLO
The typical hysteresis for both UVLO thresholds is 0.5V.
The bootstrap capacitor value should be selected care-
fully to avoid unintentional oscillations during turn-on
and turn-off at the DH output. Choose the capacitor
value about 20 times higher than the total gate capaci-
tance of the MOSFET. Use a low-ESR-type X7R dielec-
tric ceramic capacitor at BST (typically a 0.1µF ceramic
is adequate) and a parallel combination of 1µF and
0.1µF ceramic capacitors from V
(MAX5062_, MAX5063_) or to PGND (MAX5064_). The
high-side MOSFET’s continuous on-time is limited due
to the charge loss from the high-side driver’s quiescent
current. The maximum on-time is dependent on the size
of C
The MAX5062/MAX5063/MAX5064 have low 2.5Ω
R
in the output stage. This allows for a fast turn-on and
turn-off of the high gate-charge switching MOSFETs.
The peak source and sink current is typically 2A.
Propagation delays from the logic inputs to the driver
outputs are matched to within 8ns. The internal p- and
n-channel MOSFETs have a 1ns break-before-make
logic to avoid any cross conduction between them. This
internal break-before-make logic eliminates shoot-
through currents reducing the operating supply current
as well as the spikes at V
mately equal to V
drop below V
125V/2A, High-Speed,
Half-Bridge MOSFET Drivers
10
DS_ON
BST
______________________________________________________________________________________
HIGH
, I
p-channel and n-channel devices (totem pole)
BST
), referenced to HS, and pulls DH low when
(50µA max), and UVLO
DD
, when they are in a high state and to
DD
DD
BST
and the DH-to-HS voltage, a diode
DD
falls below 6.8V. The high-side
.
DD
rises above its UVLO thresh-
Undervoltage Lockout
. The DL voltage is approxi-
BST
BST
. In the two-switch
BST
Output Driver
.
. For synchro-
DD
to GND
LOW
zero when in a low state. The driver R
higher V
sink currents and faster switching speeds.
An internal diode connects from V
used in conjunction with a bootstrap capacitor external-
ly connected between BST and HS. The diode charges
the capacitor from V
on and isolates V
side driver turns on (see the Typical Operating Circuit).
The internal bootstrap diode has a typical forward volt-
age drop of 0.9V and has a 10ns typical turn-off/turn-on
time. For lower voltage drops from V
an external Schottky diode between V
Half-bridge and synchronous buck topologies require
that the high- or low-side switch be turned off before
the other switch is turned on to avoid shoot-through
currents. Shoot-through occurs when both high- and
low-side switches are on at the same time. This condi-
tion is caused by the mismatch in the propagation
delay from IN_H/IN_L to DH/DL, driver output imped-
ance, and the MOSFET gate capacitance. Shoot-
through currents increase power dissipation, radiate
EMI, and can be catastrophic, especially with high
input voltages.
The MAX5064 offers a break-before-make (BBM) fea-
ture that allows the adjustment of the delay from the
input to the output of each driver. The propagation
delay from the rising edges of IN_H and IN_L to the ris-
ing edges of DH and DL, respectively, can be pro-
grammed from 16ns to 95ns. Note that the BBM time
(t
because of the fixed comparator delay in the BBM
block. The propagation delay mismatch (t
needs to be included when calculating the total t
error. The low 8ns (maximum) delay mismatch reduces
the total t
calculate R
t
where t
BBM_ERROR
BBM
R
t
BBM ERROR
BBM
) has a higher percentage error at lower value
BBM
_
DD
BBM
=
Programmable Break-Before-Make
. Lower R
is in nanoseconds.
:
10
BBM
variation. Use the following equations to
k
Ω
DD
=
×
for the required BBM time and
0 15
when HS is pulled high as the high-
DD
⎛
⎜
⎝
.
DS_ON
t
BBM
8
Internal Bootstrap Diode
when the DL low-side switch is
ns
×
t
−
BBM
means higher source and
1
⎞
⎟
⎠
for R
+
DD
t
DD
DD
MATCH
BBM
DS_ON
to BST, connect
and BST.
to BST and is
(MAX5064)
<
_
is lower at
200
MATCH_
k
Ω
BBM
)