MAX5074 Maxim Integrated Products, MAX5074 Datasheet - Page 7

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MAX5074

Manufacturer Part Number
MAX5074
Description
Power IC with Integrated MOSFETs
Manufacturer
Maxim Integrated Products
Datasheet
Power IC with Integrated MOSFETs for Isolated IEEE
802.3af PD and Telecom Power-Supply Applications
PIN
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
REGOUT
XFRMRH
XFRMRL
FLTINT
INBIAS
NAME
PPWM
DRVIN
PGND
DRNH
RAMP
OPTO
UVLO
RTCT
RCFF
GND
HVIN
CSS
SRC
BST
CS
EP
_______________________________________________________________________________________
Regulator Output. Always present as long as HVIN is powered with a voltage above UVLO threshold.
Bypass REGOUT to GND with a minimum 2.2µF ceramic capacitor.
Oscillator Frequency Set Input. Connect a resistor from RTCT to REGOUT and a capacitor from RTCT to
GND to set the oscillator frequency.
Fault Integration Input. During persistent current-limit faults, a capacitor connected to FLTINT is charged
with an internal 80µA current source. Switching is terminated when V
resistor connected in parallel discharges the capacitor. Switching resumes when V
Feed-Forward Input. To generate the PWM ramp, connect a resistor from RCFF to HVIN and a capacitor
from RCFF to GND.
PWM Ramp Sense Input. Connect RAMP to RCFF.
PWM Comparator Inverting Input. Connect the collector of the optotransistor to OPTO and a pullup resistor
to REGOUT.
Soft-Start and Reference. Connect a 10nF or greater capacitor from CSS to GND.
PWM Pulse Output. PPWM leads the internal power MOSFET pulse by approximately 100ns.
Signal Ground. Connect GND to PGND.
Current-Sense Input. The current-limit threshold is internally set to 156mV relative to PGND. The device has
an internal noise filter. If necessary, connect an external RC filter for additional filtering.
Power Ground. Connect PGND to GND.
Internal Low-Side Power MOSFET Source. Connect SRC to PGND with a low-value resistor for current
limiting.
Low-Side Connection for the Isolation Transformer
MOSFET Gate-Driver Supply Input. Bypass DRVIN with at least 0.1µF to PGND. Connect DRVIN to
REGOUT.
High-Side Connection for the Isolation Transformer
Drain Connection of the Internal High-Side PWM Power MOSFET. Connect DRNH to the most positive rail
of the input supply. Bypass DRNH appropriately to handle the heavy switching current through the
transformer.
Boost Input. BST is the boost connection point for the high-side MOSFET driver. Connect a minimum
0.1µF capacitor from BST to XFRMRH with short and wide PC board traces.
Undervoltage Lockout Input. Connect a resistive divider from HVIN to UVLO and from UVLO to GND to set
the UVLO threshold.
High-Voltage Input. Connect HVIN to the most positive input supply rail.
Input from the Rectified Bias Winding. INBIAS is an input to the internal linear voltage regulator (REGOUT).
Exposed Paddle. EP is internally connected to GND. Connect the exposed paddle to a copper pad to
improve power dissipation.
FUNCTION
FLTINT
reaches 2.7V. An external
Pin Description
FLTINT
drops to 1.9V.
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