MAX5312 Maxim Integrated Products, MAX5312 Datasheet - Page 16

• Manufacturer Part Number: MAX5312
• Description: Voltage-Output DAC
• Manufacturer: Maxim Integrated Products

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Connect an external 2V to 5.25V reference to REF (the
MAX6350 is recommended). Set the output voltage
range with the reference and the input code by using
the equations below.
Unipolar Output Voltage:
where
Bipolar Output Voltage:
where
where V
is the bipolar output voltage, LSB
step size, LSB
the reference voltage, and CODE is the decimal equiva-
lent of the binary, 12-bit, DAC input code.
In either case, a 000hex input code produces the mini-
mum output (-2 x V
an 800hex input code produces the midscale output (0
for bipolar and V
code produces the full-scale output (2 x V
lar and unipolar).
±10V, 12-Bit, Serial, Voltage-Output DAC
Table 3. Output Voltage as Input Code Examples
16
MSB
BINARY DAC CODE
1000 0000 0001
1000 0000 0000
0111 1111 1111
0000 0000 0001
1111 1111 1111
0000 0000 0000
______________________________________________________________________________________
V
OUT_UNI
OUT BIP
_
External Reference and Transfer
V
OUT UNI
BIP
is the unipolar output voltage, V
REF
=
LSB
LSB
is the bipolar LSB step size, V
LSB
_
(
LSB
REF
for unipolar), and a FFFhex input
UNI
BIP
BIP
=
for bipolar and 0 for unipolar),
LSB
=
=
2
×
4
UNI
×
×
2
CODE
2
V
12
12
V
REF
UNI
×
REF
+2 x V
UNIPOLAR (UNI/BIP_ = HIGH)
CODE
) (
is the unipolar LSB
+2 x V
+2 x V
+2 x V
−
+2 x V
REF
2
×
REF
REF
REF
REF
Functions
(2048 / 4096) = V
REF
V
REF
(4095 / 4096)
(2049 / 4096)
(2047 / 4096)
0
for bipo-
OUT_BIP
(1 / 4096)
)
REF
is
REF
The output-amplifier section can be configured as
either unipolar or bipolar by the UNI/BIP logic input.
With UNI/BIP forced low, SW1 and SW2 in Figure 4 are
closed, and SW3 is open. This configuration channels
the DAC output through two output stages to generate
the ±2 x V
ates the ±V
increases it by two. When configured for bipolar opera-
tion, the MAX5312 must be driven with dual ±12V to
±15V power supplies.
With UNI/BIP forced high, switches SW1 and SW2 are
open, and SW3 is closed. This configuration channels
the DAC output through only a single gain stage to gen-
erate a 0 to (2 x V
SPI-/QSPI-/MICROWIRE-compatible devices can be
daisy chained to reduce I/O lines from the host con-
troller (Figure 7). Daisy chain devices by connecting
the DOUT of one device to the DIN of the next, and
connect the SCLK of all devices to a common clock.
Data is shifted out of DOUT 16.5 clock cycles after it is
shifted into DIN, and is available on the rising edge of
the 17th clock cycle. The SPI-/QSPI-/MICROWIRE-com-
patible serial interface normally works at up to 10MHz,
but must be slowed to 6.0MHz if daisy chaining. DOUT
is high impedance when CS is high.
Shutdown is controlled by software commands or by the
SHDN logic input. The SHDN logic input can be imple-
mented at any time. The SPI-/QSPI-/MICROWIRE-compat-
ible serial interface remains fully functional, and the device
is programmable while shut down. When shut down, the
MAX5312 supply current reduces to 3.5µA, DOUT is high
impedance, and OUT is pulled to SGND through the inter-
nal feedback resistors of the output amplifier (Figure 1).
When coming out of shutdown, or during device power-
up, allow 350µs for the output to stabilize.
ANALOG OUTPUT
REF
REF
output swing. The first amplifier gener-
voltage range and the second amplifier
REF
-2 x V
BIPOLAR (UNI/BIP_ = LOW)
) output swing.
+2 x V
REF
-2 x V
+2 x V
-2 x V
(2048 / 2048) = -2 x V
REF
REF
REF
REF
(2047 / 2048)
(2047 / 2048)
Output Amplifiers
0
(1 / 2048)
(1 / 2048)
Daisy Chaining
Shutdown
REF
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