MAX5883 Maxim, MAX5883 Datasheet - Page 4

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MAX5883

Manufacturer Part Number
MAX5883
Description
3.3V / 12-Bit / 200Msps High Dynamic Performance DAC with CMOS Inputs
Manufacturer
Maxim
Datasheet

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ELECTRICAL CHARACTERISTICS (continued)
(AV
200Msps, T
characterization. Typical values are at T
3.3V, 12-Bit, 200Msps High Dynamic
Performance DAC with CMOS Inputs
4
Note 1: Nominal full-scale current I
Note 2: This parameter does not include update-rate depending effects of sin(x)/x filtering inherent in the MAX5883.
Note 3: Parameter measured single ended into a 50 termination resistor.
Note 4: Parameter guaranteed by design.
Note 5: Parameter defined as the change in midscale output caused by a ±5% variation in the nominal supply voltage.
Data Latency
Minimum Clock Pulse Width High
Minimum Clock Pulse Width Low
CMOS LOGIC INPUTS (B0–B11, PD, SEL0, XOR)
Input Logic High
Input Logic Low
Input Leakage Current
Input Capacitance
CLOCK INPUTS (CLKP, CLKN)
Differential Input Voltage Swing
Differential Input Slew Rate
Common-Mode Voltage Range
Input Resistance
Input Capacitance
POWER SUPPLIES
Analog Supply Voltage Range
Digital Supply Voltage Range
Clock Supply Voltage Range
Analog Supply Current
Digital Supply Current
Clock Supply Current
Power Dissipation
Power-Supply Rejection Ratio
DD
_______________________________________________________________________________________
= DV
PARAMETER
A
DD
= T
= VCLK = 3.3V, AGND = DGND = CLKGND = 0V, external reference, V
MIN
to T
MAX
, unless otherwise noted. +25°C guaranteed by production test, <+25°C guaranteed by design and
OUT
SYMBOL
SR
V
I
I
A
C
AV
DV
I
P
PSRR
V
R
V
DVDD
AVDD
VCLK
C
t
V
= 32
t
V
COM
DISS
I
CH
CLK
CLK
CLK
CLK
= +25°C.)
CL
IN
CLK
IH
IN
IL
DD
DD
I
REF
CLKP, CLKN
CLKP, CLKN
Sine wave
Square wave
(Note 5)
f
Power-down
f
Power-down
f
Power-down
f
Power-down
AV
CLK
CLK
CLK
CLK
.
DD
= 100Msps, f
= 100Msps, f
= 100Msps, f
= 100Msps, f
= VCLK = DV
CONDITIONS
OUT
OUT
OUT
OUT
DD
= 1MHz
= 1MHz
= 1MHz
= 1MHz
= 3.3V 5% (Note 5)
REFIO
= 1.25V, R
DV
3.135
3.135
3.135
0.7 x
MIN
-0.1
-15
DD
L
= 50 , I
>100
TYP
132
1.5
20%
3.3
3.3
3.3
0.3
7.5
5.5
3.5
1.5
1.5
27
10
10
1.5
0.5
5
5
5
1
OUT
DV
3.465
3.465
3.465
MAX
0.3 x
+0.1
+15
= 20mA, f
DD
UNITS
cycles
%FS/V
Clock
V
V/µs
mW
mA
mA
mA
k
µA
pF
pF
µA
µA
ns
ns
CLK
V
V
P-P
V
V
V
V
=

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