AT91FR40161 ATMEL Corporation, AT91FR40161 Datasheet - Page 136

• Manufacturer Part Number: AT91FR40161
• Description: The AT91FR40161 Features 136 K Bytes of On-chip SRAM, 2M Bytes of Flash, an External Bus Interface, a 3-channel Timer/Counter, 2 ...
• Manufacturer: ATMEL Corporation

• LDBDIS: Counter Clock Disable with RB Loading (Code Label TC_LDBDIS)
0 = Counter clock is not disabled when RB loading occurs.
1 = Counter clock is disabled when RB loading occurs.
• ETRGEDG: External Trigger Edge Selection
•
• CPCTRG: RC Compare Trigger Enable (Code Label TC_CPCTRG)
0 = RC Compare has no effect on the counter and its clock.
1 = RC Compare resets the counter and starts the counter clock.
• WAVE = 0 (Code Label TC_WAVE)
0 = Capture Mode is enabled.
1 = Capture Mode is disabled (Waveform Mode is enabled).
•
•
136
ABETRG
0
1
ABETRG: TIOA or TIOB External Trigger Selection
LDRA: RA Loading Selection
LDRB: RB Loading Selection
0
0
1
1
0
0
1
1
0
0
1
1
ETRGEDG
LDRA
LDRB
AT91X40 Series
0
1
0
1
0
1
0
1
0
1
0
1
None
Rising Edge
Falling Edge
Each Edge
Edge
None
Rising edge of TIOA
Falling edge of TIOA
Each edge of TIOA
Edge
Selected ABETRG
TIOB is used as an external trigger.
TIOA is used as an external trigger.
Edge
None
Rising edge of TIOA
Falling edge of TIOA
Each edge of TIOA
TC_ETRGEDG_FALLING_EDGE
TC_ETRGEDG_RISING_EDGE
TC_LDRA_FALLING_EDGE
TC_LDRB_FALLING_EDGE
TC_ETRGEDG_EDGE_NONE
TC_ETRGEDG_BOTH_EDGE
TC_LDRB_RISING_EDGE
TC_LDRA_RISING_EDGE
TC_LDRB_EDGE_NONE
TC_LDRB_BOTH_EDGE
TC_LDRA_EDGE_NONE
TC_LDRA_BOTH_EDGE
TC_ABETRG_TIOB
TC_ABETRG_TIOA
TC_ETRGEDG
Code Label
Code Label
TC_ABETRG
Code Label
Code Label
TC_LDRB
TC_LDRA
1354D–ATARM–08/02