ADC700KH Burr-Brown Corporation, ADC700KH Datasheet - Page 12
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ADC700KH
Manufacturer Part Number
ADC700KH
Description
16-bit Resolution With Microprocessor Interface A/D Converter
Manufacturer
Burr-Brown Corporation
Datasheet
1.ADC700KH.pdf
(12 pages)
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Part Number:
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Because the last data-word is stored in the data latch, it is
possible to read it during the next A/D conversion. Assertion
of CS and HBEN for reading parallel data should be timed
from Status going low. The two-byte read operation must be
complete before the conversion in process is complete or the
Data Read is invalid.
Serial Data is available during continuous conversion with
word synchronization available from STATUS.
USING A SAMPLE/HOLD WITH ADC700
Figure 12 illustrates using ADC700 with the Burr-Brown
SHC76. The sample-to-hold settling time (to 14 bits,
from the Status going High to the first conversion decision
is about 900ns. Therefore a time delay between the Sample-
to-Hold command to the WR command to the ADC700 is
required.
0.003%FSR) of the SHC76 is 1 s typ, 3 s max. The time
®
ADC700
12
FIGURE 12. Using Sample/Hold with ADC700 Requires
ADC700
Control
Mode
WR
Sample
Analog
In
Time Delay Between Sample and Start-of-Con-
version.
SHC76
Hold
Mode
Control
1µs to 3µs
ADC700
Start Conversion