ATJ2073 ETC, ATJ2073 Datasheet - Page 26

• Manufacturer Part Number: ATJ2073
• Description: The Atj2073 is a Single-chip Highly-intergrated Digital Music System Solution for Devices such as Dedicated Audio Players, Pdas, and cell Phones
• Manufacturer: ETC

5.8 Power Management Unit (PMU)
Page 26 of 45
active.
but low frequency OSC, while you design appropriately.
PMU consists of DC-DC converter and regulator and battery monitor.
ATJ2073 need two power trails if work rightly, VDD (Core Power) and VCC (I/O Power). The power level
is decided by external voltage-divided resistance network . Due to describe clearly , we assume VDD=2.35V,
VCC=3.15V.
There are two battery modes with ATJ2073, one-battery mode and two-battery mode, selected by BATSEL.
In one-battery mode, if pin VBAT > 0.8V, some internal circuit (C1) begin to work first and it will rise up
VDD. When VDD reaches 2.35V, that internal circuit (C1) stops and another circuit (C2) takes over the
PFM for both VDD and VCC DC-DC converter.
In two-battery mode, if pin VBAT > 1.3V, the internal regulator is enabled to supply VDD. If 0.8V < VBAT
< 1.3V, C2 will stimulate VDD DC-DC converter to maintain VDD. The judgement between VBAT and
1.3V must have hysteresis for preventing ATJ2073 from unstable toggle between regulator mode and
DC-DC mode. The VCC DC-DC converter always runs to maintain VCC.
Battery monitor compares the battery voltage at the VBAT pin with four reference voltage pins named VL0,
VL1, VL2, VL3. The four reference voltages are decided by external resistance network. For normal dry
battery (1.5V) , the value can be : 1.4V, 1.3V, 1.15V, and 1.05V.
If VBAT < VL3, ATJ2073 will go into STANDBY mode;
If VBAT < 0.8V, ATJ2073 will go into OFF mode, but the low frequency OSC and RTC timer are still
You can disable the clock of block when you do not use that block. Even more you can stop all the clock,
bit
ATJ2073
0
Pream ble
3 4
AuxData
7 8
Figure 7.4.
Figure 7.3. Preamble Forms
Sub-f ram e
Sub-frame Format
Audio Data
Channel Status Data
User Data
Parity Bit
V alidity
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V U C P
Data Sheet