MAX791 Maxim, MAX791 Datasheet - Page 9

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MAX791

Manufacturer Part Number
MAX791
Description
Microprocessor Supervisory Circuit
Manufacturer
Maxim
Datasheet

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Figure 4. Adding an external pull-down resistor ensures
R
The MAX791’s RESET output ensures that the µP pow-
ers up in a known state, and prevents code-execution
errors during power-down or brownout conditions.
The RESET output is active low, and typically sinks
3.2mA at 0.1V saturation voltage in its active state.
When deasserted, RESET sources 1.6mA at typically
V
output is guaranteed to be valid down to V
an external 10kΩ pull-down resistor on RESET ensures
that RESET will be valid with V
4). As V
output switch reduces accordingly, increasing the
r
resistor ensures the parallel combination of switch plus
resistor is around 10kΩ and the output saturation volt-
age is below 0.4V while sinking 40µA. When using a
10kΩ external pull-down resistor, the high state for the
RESET output with V
tery voltages ≥ 2V connected to VBATT, RESET
remains valid for V
RESET will be asserted during the following conditions:
The MAX791 battery-switchover comparator does not
affect RESET assertion. However, RESET is asserted in
battery-backup mode since V
reset threshold to enter this mode.
DS(ON)
1) V
2) MR < 1.25V (typ)
3) RESET remains asserted for 200ms (typ) after V
E
OUT
S
E
T
rises above 4.65V or after MR has exceeded
1.25V.
- 0.5V. When no backup battery is used, RESET
CC
is valid with V
CC
and the saturation voltage. The 10kΩ pull-down
< 4.65V (typ)
goes below 1V, the gate drive to the RESET
MAX791
_______________________________________________________________________________________
CC
CC
CC
RESET
down to GND.
from 0V to 5.5V.
= 4.75V is 4.5V typical. For bat-
15
Microprocessor Supervisory Circuit
CC
CC
10k
down to GND (Figure
must be below the
RESET Output
TO P RESET
CC
= 1V, and
CC
The watchdog monitors µP activity via the Watchdog
Input (WDI). If the µP becomes inactive, WDO and
WDPO are asserted. To use the watchdog function,
connect WDI to a bus line or µP I/O line. If WDI remains
high or low for longer than the watchdog timeout period
(1.6sec nominal), WDPO and WDO are asserted, indi-
cating a software fault condition (see Watchdog Output
and Watchdog-Pulse Output sections).
A change of state (high to low, low to high, or a mini-
mum 100ns pulse) at WDI during the watchdog period
resets the watchdog timer. The watchdog default time-
out is 1.6sec. Select alternative timeout periods by con-
necting an external capacitor from SWT to GND (see
Selecting an Alternative Watchdog Timeout section).
To disable the watchdog function, leave WDI floating.
An internal resistor network (100kΩ equivalent imped-
ance at WDI) biases WDI to approximately 1.6V.
Internal comparators detect this level and disable the
watchdog timer. When V
old, the watchdog function is disabled and WDI is dis-
connected from its internal resistor network, thus
becoming high impedance.
WDO remains high if there is a transition or pulse at
WDI during the watchdog-timeout period. The watch-
dog function is disabled and WDO is a logic high when
V
is enabled, or WDI is an open circuit. In watchdog
mode, if no transition occurs at WDI during the watch-
Figure 5. WDI,
CC
WDPO
WDO
WDI
is below the reset threshold, battery-backup mode
W
D
O
and
W
70ns
D
1.6sec
CC
P
O
Timing Diagram (V
is below the reset thresh-
Watchdog Function
Watchdog Output
Watchdog Input
100ns MIN
CC
mode)
9

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