SS1621B-48SSOP Shenzhen SI Semiconductors Co., LTD., SS1621B-48SSOP Datasheet - Page 8

• Manufacturer Part Number: SS1621B-48SSOP
• Description: RAM Mapping 32 X 4 LCD Controller for I/O uC
• Manufacturer: Shenzhen SI Semiconductors Co., LTD.

on-chip RC oscillator or for the crystal oscil-
lator. Once the system clock stops, the LCD
display will become blank, and the time
base/WDT lose its function as well.
the LCD bias generator off. After the LCD
bias generator switches off by issuing the
LCD OFF command, using the SYS DIS
command reduces power consumption, serv-
ing as a system power down command. But if
the external clock source is chosen as the sys-
tem clock, using the SYS DIS command can
neither turn the oscillator off nor carry out the
power down mode. The crystal oscillator op-
tion can be applied to connect an external
frequency source of 32kHz to the OSCI pin.
In this case, the system fails to enter the
power down mode, similar to the case in the
external 256kHz clock source operation. At
the initial system power on, the SS1621 is at
the SYS DIS state.
Time base and Watchdog Timer (WDT)
an 8-stage count-up ripple counter and is de-
signed to generate an accurate time base. The
watch dog timer (WDT), on the other hand, is
composed of and 8-stage time base generator
along with a 2-stage count-up counter, and is
designed to break the host controller or other
subsystems from abnormal states such as un-
known or unwanted jump, execution errors,
etc. The WDT time-out will result in the set-
ting of and internal WDT time-out flag. The
outputs of the time base generator and of the
WDT time-out flag can be connected to the
totally eight frequency sources available for
the time base generator and the WDT clock.
The frequency is calculated by the following
equation.
IRQ output by a command option. There are
The LCD OFF command is used to turn
The time base generator is comprised by
f
WDT
=
32kHz
2
n
by command options. The 32kHz in the above
equation indicates that the source of the sys-
tem frequency is derived from a crystal oscil-
lator of 32.768kHz, an on-chip oscillator
(256kHz), or an external frequency of
256kHz.
external 256kHz frequency is chosen as the
source of the system frequency, the frequency
source is by default prescaled to 32kHz by a
3-stage prescaler. Employing both the time
base generator and the WDT related com-
mands, one should be careful since the time
base generator and WDT share the same
8-stage counter. For example, invoking the
WDT DIS command disables the time base
generator whereas executing the WDT EN
command not only enables the time base gen-
erator but activates the WDT time-out flag
output (connect the WDT time-out flag to the
IRQ pin). After the TIMER EN command is
transferred, the WDT is disconnected from
the IRQ pin, and the output of the time base
generator is connected to the IRQ pin. The
WDT can be cleared by executing the CLR
WDT command, and the contents of the base
time generator is cleared by executing the
CLR WDT or the CLR TIMER command.
The CLR WDT or the CLR TIMER com-
mand should be executed prior to the WDT
EN or the TIMER EN command respectively.
Before executing the IRQ EN command the
CLR WDT or CLR TIMER command should
be executed first. The CLR TIMER command
has to be executed before switching from the
WDT mode to the time base mode. Once the
WDT time-out occurs, the IRQ pin will stay
at a logic low level until the CLR WDT or the
IRQ DIS command is issued. After the IRQ
output is disabled the IRQ pin will remain at
the floating state. The IRQ output can be en-
abled or disabled by executing the IRQ EN
or the IRQ DIS command, respectively. The
IRQ EN makes the output of the time base
p. 8
Where the value of n ranges from 0 to 7
If an on-chip oscillator (256kHz) or an
Last update: 2008-06-03 04:36
SS1621