ATA5021 ATMEL, ATA5021 Datasheet - Page 8

• Manufacturer Part Number: ATA5021
• Description: Digital Window Watchdog Timer
• Manufacturer: ATMEL

4. State Diagram
Figure 4-1.
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8
time-out t
ATA5021
Notes:
1. mode_d and trg_d are the debounced signals of the MODE and TRG pins
2. wedge is the detection of a signal edge on the wake-up pin after the deboucing time
3. trg_ok is valid for once cycle after the rising edge on trg_d
4. trg_err is valid if the low period of trg_d is too long
State Diagram of the Finite State Machine
6
Switch
Mode
time-out t
State
time-out t
Reset
State
Out
The kernel of the watchdog is a finite state machine.
possible states and transmissions. Many transmissions are controlled by an internal timer. The
numbers for the time-outs are the same as on the pulse diagrams.
1
0
trg_d = 0
mode_d = 0
OR trg_err
time-out t
Reset
State
3
trg_ok
time-out t
Window
Window
Disable
Enable
Short
State
Short
State
2
mode_d = 1
OR trg_err
OR wedge
time-out t
mode_d = 0
mode_d = 0
Figure 4-1
5
mode_d = 1
OR wedge
trg_d = 0
shows the state diagram with all
time-out t
Window
Window
Disable
Disable
State
State
Long
Long
4
trg_ok
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