AD1980 Analog Devices, AD1980 Datasheet - Page 10

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AD1980

Manufacturer Part Number
AD1980
Description
AD1980 AC'97 SoundMAX® Codec W/spdif W/eq
Manufacturer
Analog Devices
Datasheet

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NOTES
All registers not shown and bits containing an X are assumed to be reserved.
Writing any value to this register performs a register reset, which causes all registers to revert to their default values (except 74h, which forces the serial configuration).
Reading this register returns the ID code of the part and a code for the type of 3D Stereo Enhancement.
ID[9:0] Identify Capability. The ID decodes the capabilities of AD1980 based on the following:
SE[4:0] Stereo Enhancement. The AD1980 does not provide hardware 3D stereo enhancement. (All bits are zeros.)
NOTES
1
2
Note that depending on the state of the AC97NC bit in Register 0x76, this register has the following additional functionality:
RMV[5:0]
RM
LMV[5:0]
MM
Refer to Table I for examples. This register controls the Line_Out volume controls for both stereo channels and mute bit. Each volume subregister contains five bits,
For AC ’97 compatibility, Bit D7 is available only by setting the MSPLT bit, Register 76h. The MSPLT bit enables separate mute bits for the left and right channels.
Reg
No.
00h
Reg
No.
02h
generating 32 volume levels with 31 steps of 1.5 dB each. Because AC ’97 defines 6-bit volume registers, to maintain compatibility whenever the D5 or D13 bits are
set to “1,” their respective lower five volume bits are automatically set to “1” by the codec logic. On readback, all lower five bits will read “1s” whenever these bits are set
to “1.”
If MSPLT is not set, bit D7 has no effect. All registers not shown and bits containing an X are assumed to be reserved.
For AC97NC = 0, the register controls the Line_out output Attenuators only.
For AC97NC = 1, the register controls the Line_out, Center, and LFE output Attenuators.
Name
Master
Volume
Name
Reset
D15
MM
Right Master Volume Control. The least significant bit represents 1.5 dB. This register controls the output from
0 dB to a maximum attenuation of 46.5 dB.
Right Channel Mute. Once enabled by the MSPLT bit in Register 76h, this bit mutes the right channel separately
from the MM bit. Otherwise this bit will always read “0” and will have no effect when set to “1.”
Left Master Volume Control. The least significant bit represents 1.5 dB. This register controls the output from 0 dB
to a maximum attenuation of 46.5 dB.
Headphones Volume Mute. When this bit is set to “1,” both the left and the right channels are muted, unless the
MSPLT bit in Register 76h is set to “1.”
D15
X
D14 D13
X
D14
SE4
LMV5 LMV4 LMV3 LMV2 LMV1 LMV0 MMRM
SE3
D13
1
Bit = 1
ID0
ID1
ID2
ID3
ID4
ID5
ID6
ID7
ID8
ID9
D12
D12
SE2
D11
D11
SE1
Function
Dedicated Mic PCM In Channel
Modem Line Codec Support
Bass and Treble Control
Simulated Stereo (Mono to Stereo)
Headphone Out Support
Loudness (Bass Boost) Support
18-Bit DAC Resolution
20-Bit DAC Resolution
18-Bit ADC Resolution
20-Bit ADC Resolution
Master Volume Register (Index 02h)
D10
D10
SE0
Reset Register (Index 00h)
ID9
D9
D9
–10–
ID8
D8
D8
D7
ID7
D7
D6
ID6
2
D6 D5
X
RMV5 RMV4 RMV3 RMV2 RMV1 RMV0 8000h
D5
ID5
1
AD1980
0
0
0
0
1
0
0
1
0
0
D4
D4
ID4
D3
D3
ID3
D2
D2
ID2
D1
ID1
D1
D0
ID0
D0
Default
0090h
REV. 0
Default

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