AD1981A Analog Devices, AD1981A Datasheet - Page 21

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AD1981A

Manufacturer Part Number
AD1981A
Description
AD1981A AC'97 Soundmax Codec
Manufacturer
Analog Devices
Datasheet

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REGM0
REGM1
REGM2
SLOT16
MBG[1:0]
VREFD
VREFH
MADST
MADPD
FMXE
DAM
MSPLT
DACZ
S[7:0] This register is ASCII encoded to ‘A’
F[7:0] This register is ASCII encoded to ‘D’
Reg Num Name
Reg Num Name
76h
7Ch
Misc Control Bits DACZ X MSPLT X DAM X FMXE X X MADPD X MADST VREFH VREFD MBG1 MBG0 0000h
Vendor ID1 F7
Enable 16-Bit Slot Mode.
MIC Boost Gain Change Register:
Mixer ADC Power-Down: Controls power-down for mixer digitizing ADC.
Master Codec Register Mask
Slave 1 Codec Register Mask
Slave 2 Codec Register Mask
SLOT16 makes all AC link slots 16 bits in length, formatted into 16 slots.
This is a preferred mode for DSP serial port interfacing.
These two bits allow changing the MIC preamp gain from the nominal 20 dB gain.
Note: This gain setting only takes effect while Bit D6 (M20) on the MIC Volume Register (0Eh) is set to 1. Otherwise
the MIC boost block has a gain of 0 dB.
00 = 20 dB Gain (Reset Default)
01 = 10 dB Gain
10 = 30 dB Gain
11 = Reserved
V
Note that this bit overrides the VREFH bit selection (see below).
0 = V
1 = V
V
0 = V
1 = V
Mixer ADC Status Bit: Indicates status of mixer digitizing ADC (L/R channels)
0 = Mixer ADC Not Ready
1 = Mixer ADC Is Ready
0 = Mixer ADC Is Powered-On (Default)
1 = Mixer ADC Is Powered-Down
Front DAC into Mixer Enable: Controls the Front (main) DAC to Mixer mute switches.
0 = Front DAC Outputs Are Allowed to Sum into the Mixer (Reset Default)
1 = Front DAC Outputs Are Muted into the Mixer (Blocked)
Digital Audio Mode: PCM DAC outputs bypass the analog mixer and are sent directly to the Codec output.
Mute Split: Allows separate mute control bits for master, Headphone, LINE_IN, CD, AUX, and PCM volume control
Registers as well as Record Gain Register and mixer ADC volume.
0 = Both Left and Right Channel Mutes Are Controlled by Bit 15 in the Respective Registers (Reset Default)
1 = Bit 15 Affects Only the Left Channel Mute and Bit 7 Affects Only the Right Channel Mute
DAC Zero-Fill: (versus repeat) if DAC is starved for data.
0 = When DAC Is Filled with Repeat Data
1 = When DAC Is Filled with Zeros (Reset Default)
REFOUT
REFOUT
REFOUT
REFOUT
REFOUT
REFOUT
Disable: Disables V
High: Changes V
D15 D14
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Default
Pin Is Driven by the Internal Reference (Reset Default)
Pin Is Placed into High Zout Mode
Pin Is set to 2.25 V Output (Reset Default)
Pin Is set to 3.70 V Output
F6
D13
REFOUT
F5
D12 D11 D10
Miscellaneous Control Bits (Index 76h)
REFOUT
Vendor ID Registers (Index 7Ch)
F4
from 2.25 V to 3.70 V for MIC bias applications.
placing it into High Zout mode.
F3
D9
F2
D8 D7
F1 F0 S7 S6 S5 S4 S3 S2 S1 S0
D6
D5
D4
D3
D2
D1
AD1981A
D0
4144h
Default

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