ADSST-SALEM-3T Analog Devices, ADSST-SALEM-3T Datasheet - Page 4

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ADSST-SALEM-3T

Manufacturer Part Number
ADSST-SALEM-3T
Description
Powerful Energy Meter Chipset
Manufacturer
Analog Devices
Datasheet
DataSheet4U.com
www.DataSheet4U.com
DataSheet
ADSST-SALEM-3T
GENERAL DESCRIPTION OF THE ADSST-218X DSP
The ADSST-218x is a single-chip microcomputer optimized for
digital signal processing (DSP) and other high speed numeric
processing applications.
The DSP combines the ADSP-2100 family base architecture
(three computational units, data address generators, and a pro-
gram sequencer) with two serial ports, a 16-bit internal DMA
port, a byte DMA port, a programmable timer, flag I/O, exten-
sive interrupt capabilities, and on-chip program and data
memory.
The ADSST-218x is fabricated in a high speed, low power
CMOS process. Every instruction can execute in a single proc-
essor cycle.
The ADSST-218x’s flexible architecture and comprehensive
instruction set enable the processor to perform multiple opera-
tions in parallel. In one processor cycle, the ADSST-218x can:
4
Generate the next program address
Fetch the next instruction
Perform one or two data moves
Update one or two data address pointers
Perform a computational operation
U
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DATA ADDRESS
GENERATORS
DAG1
ALU
ARITHMETIC UNITS
ADSP-2100 BASE
ARCHITECTURE
DAG2
MAC
SEQUENCER
PROGRAM
SHIFTER
PROGRAM MEMORY ADDRESS
PROGRAM MEMORY DATA
DATA MEMORY ADDRESS
DATA MEMORY DATA
16K × 24-BIT
PROGRAM
MEMORY
Figure 3. Functional Block Diagram
SPORT0
POWER-DOWN
SERIAL PORTS
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CONTROL
MEMOR Y
Rev. 0 | Page 4 of 24
16K × 16-BIT
SPORT1
MEMORY
DATA
This takes place while the processor continues to:
ARCHITECTURE OVERVIEW
The ADSST-218x instruction set provides flexible data moves
and multifunction (one or two data moves with a computation)
instructions. Every instruction can be executed in a single proc-
essor cycle. The ADSST-218x assembly language uses an
algebraic syntax for ease of coding and readability. A compre-
hensive set of development tools supports program
development.
Figure 3 is the functional block diagram of the ADSST-218x.
The processor contains three independent computational units:
the ALU, the multiplier/accumulator (MAC), and the shifter.
The computational units process 16-bit data directly and have
provisions to support multiprecision computations.
Receive and transmit data through the two serial ports
Receive and/or transmit data through the internal
DMA port
Receive and/or transmit data through the byte DMA port
Decrement timer
TIMER
PROGRAMMABLE
FLAGS
AND
I/O
FULL MEMORY MODE
CONTROLLER
HOST MODE
EXTERNAL
EXTERNAL
EXTERNAL
BYTE DMA
INTERNAL
ADDRESS
DATA
DATA
PORT
DMA
BUS
BUS
BUS
O R
03738- 0- 008

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