AL4V18x AverLogic Technologies, Inc., AL4V18x Datasheet - Page 8

• Manufacturer Part Number: AL4V18x
• Description: 1K X 18 And 4K X 18 Line Buffers
• Manufacturer: AverLogic Technologies, Inc.

/RS
/BEB
IW
OW
Power/Ground Signals
VCC
GND
NC
8.0 Memory Operations
8.1 Inputs and Outputs
8.1.1 Data Input (D17
D17 ~ D0 are 9-bit or 18-bit wide of input data port. During Reset, if IW is LOW, the Input port will
be configured to 18-bit mode and D17 ~ D0 are used. If IW is HIGH, the Input port will be
configured to 9-bit mode and D8 ~ D0 are used.
8.1.2 Data Output (Q17-Q0)
Q0-Q17 are data outputs for 18-bit wide data. During Reset, if OW is LOW, the Output port will be
configured to 18-bit mode and Q17 ~ Q0 are used. If IW is HIGH, the Output port will be configured
to 9-bit mode and Q8 ~ Q0 are used.
8.2 Controls
8.2.1 Reset (/RS)
Reset takes place when the Reset (/RS) input is LOW. During the system power on, a 200us negative
pulse on /RS pin is required to initial internal logic after power-up. Apply a valid reset pulse to
/WRSTB and /RRSTB after power-on-reset to reset read/write address pointer to zero.
AL4V183/AL4V185
Pin Symbol
/Little-Endian
Big-Endian
Output Bus
Input Bus
Pin name
Ground
Width
Width
Power
Reset
-
~
D0)
57
18
21
24
22,33,43,56
30,35,40,46,51
,55,62
23, 25, 26, 27,
54
Pin number
I/O
typ
I
I
I
I
-
-
-
The global reset pin /RS will automatically
initialize chip logic.
During Reset, a LOW on /BEB will select Big-
Endian operation. A HIGH on /BEB during
Reset will select Little-Endian format
This pin is to configure the bus width of the
write port. During Reset, the write port will be
configured to x18 bus width if IW is LOW and
to x9 bus width if IW is HIGH.
This pin is to configure the bus width of the
read port. During Reset, the read port will be
configured to x18 bus width if OW is LOW and
to x9 bus width if OW is HIGH.
3.3V 10% power supply
Ground.
No Connect
Description
February 20, 2003
AL4V183/AL4V185
8