STK12C68 Simtek, STK12C68 Datasheet - Page 4

• Manufacturer Part Number: STK12C68
• Description: 8Kx8 AutoStore nvSRAM
• Manufacturer: Simtek

STK12C68 (SMD5962-94599)
Document Control #ML0008 Rev 0.7
SRAM READ CYCLES #1 & #2
Note g: W and HSB must be high during SRAM READ cycles.
Note h: Device is continuously selected with E and G both low.
Note i:
SRAM READ CYCLE #1: Address Controlled
SRAM READ CYCLE #2: E Controlled
DQ (DATA OUT)
DQ (DATA OUT)
NO.
10
11
1
2
3
4
5
6
7
8
9
ADDRESS
ADDRESS
February 2007
Measured ± 200mV from steady state output voltage.
t
t
t
t
t
t
t
t
t
t
t
ELQV
AVAV
AVQV
GLQV
AXQX
ELQX
EHQZ
GLQX
GHQZ
ELICCH
EHICCL
#1, #2
I
CC
SYMBOLS
G
E
g
h
h
i
i
f
f
Alt.
t
t
t
t
t
t
t
t
t
t
t
ACS
RC
AA
OE
OH
LZ
HZ
OLZ
OHZ
PA
PS
Chip Enable Access Time
Read Cycle Time
Address Access Time
Output Enable to Data Valid
Output Hold after Address Change
Chip Enable to Output Active
Chip Disable to Output Inactive
Output Enable to Output Active
Output Disable to Output Inactive
Chip Enable to Power Active
Chip Disable to Power Standby
STANDBY
PARAMETER
t
ELICCH
t
t
10
ELQX
AXQX
t
6
5
GLQX
8
t
GLQV
4
g
t
AVAV
2
t
ACTIVE
t
ELQV
AVQV
1
3
t
4
AVAV
2
STK12C68-25
MIN
25
5
5
0
0
g
,
h
MAX
25
25
10
10
10
25
STK12C68-35
MIN
DATA VALID
35
5
5
0
0
MAX
35
35
15
10
10
35
DATA VALID
STK12C68-45
MIN
45
5
5
0
0
(V
t
GHQZ
MAX
CC
45
45
20
12
12
45
9
t
EHQZ
7
t
= 5.0V ± 10%)
EHICCL
STK12C68-55
11
MIN
55
5
5
0
0
MAX
55
55
35
12
12
55
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
e