STK14C88 Simtek, STK14C88 Datasheet - Page 11
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STK14C88
Manufacturer Part Number
STK14C88
Description
32Kx8 AutoStore nvSRAM
Manufacturer
Simtek
Datasheet
1.STK14C88.pdf
(19 pages)
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Document Control #ML0014 Rev 0.3
HSB OPERATION
The STK14C88 provides the HSB pin for controlling
and acknowledging the
pin can be used to request a hardware
When the HSB pin is driven low, the STK14C88 will
conditionally initiate a
an actual
the
RECALL
drain driver that is internally driven low to indicate a
busy condition while the
means) is in progress. Pull up this pin with an exter-
nal 10K ohm resistor to V
driver.
SRAM READ
progress when HSB is driven low by any means are
given time to complete before the
is initiated. After HSB goes low, the STK14C88 will
continue
multiple
WRITE
be allowed a time, t
SRAM WRITE
will be inhibited until HSB returns high.
The HSB pin can be used to synchronize multiple
STK14C88s while using a single larger capacitor. To
operate in this mode the HSB pin should be con-
nected together to the HSB pins from the other
STK14C88s. An external pull-up resistor to + 5V is
required since HSB acts as an open drain pull down.
The V
be tied together and share a single capacitor. The
capacitor size must be scaled by the number of
devices connected to it. When any one of the
STK14C88s detects a power loss and asserts HSB,
the common HSB pin will cause all parts to request
a
STK14C88s that have been written since the last
nonvolatile cycle).
During any
was initiated, the STK14C88 will continue to drive
the HSB pin low, releasing it only when the
complete. Upon completion of the
the STK14C88 will remain disabled until the HSB
pin returns high.
If HSB is not used, it should be left unconnected.
STORE
SRAM
February 2007
CAP
is in progress when HSB is pulled low it will
SRAM READ
cycle. The HSB pin also acts as an open
SRAM
pins from the other STK14C88 parts can
STORE
cycle (a
took place since the last
STORE
cycles requested after HSB goes low
and
operations for t
cycle will only begin if a
STORE
WRITE
DELAY
operation, regardless of how it
operations may take place. If a
STORE
STORE
, to complete. However, any
CAP
STORE
will take place in those
operations that are in
operation after t
operations. The HSB
if HSB is used as a
DELAY
STORE
STORE
(initiated by any
. During t
STORE
STORE
operation
operation
WRITE
STORE
cycle.
DELAY
DELAY
or
to
is
11
;
,
PREVENTING STORES
The
holding HSB high with a driver capable of sourcing
30mA at a V
overpower the internal pull-down device that drives
HSB low for 20μs at the onset of a
the STK14C88 is connected for AutoStore operation
(system V
on V
the STK14C88 will attempt to pull HSB low; if HSB
doesn’t actually get below V
ing to pull HSB low and abort the
HARDWARE PROTECT
The STK14C88 offers hardware protection against
inadvertent
ing low-voltage conditions. When V
externally initiated
WRITE
AutoStore can be completely disabled by tying V
to ground and applying + 5V to V
AutoStore
initiated by explicit request using either the software
sequence or the HSB pin.
LOW AVERAGE ACTIVE POWER
The STK14C88 draws significantly less current
when it is cycled at times longer than 50ns. Figure 5
shows the relationship between I
time. Worst-case current consumption is shown for
both
perature range, V
enable). Figure 6 shows the same relationship for
WRITE
than 100%, only standby current is drawn when the
chip is disabled. The overall average current drawn
by the STK14C88 depends on the following items:
1)
chip enable; 3) the overall cycle rate for accesses;
4) the ratio of
temperature; 6) the V
CMOS
STORE
CAP
CMOS
s will be inhibited.
cycles. If the chip enable duty cycle is less
) and V
Inhibit mode; in this mode
CC
vs.
STORE
and
connected to V
function can be disabled on the fly by
OH
TTL
CC
READ
of at least 2.2V, as it will have to
TTL
CC
crosses V
input levels; 2) the duty cycle of
operation and
= 5.5V, 100% duty cycle on chip
STORE
s to
cc
input levels (commercial tem-
level; and 7) I/O loading.
WRITE
CCX
SWITCH
IL
operations and
, the part will stop try-
and a 68μF capacitor
s; 5) the operating
CC
STORE
SRAM WRITE
on the way down,
STORE
CAP
and
CAP
STORE
STK14C88
. This is the
< V
READ
attempt.
s are only
SWITCH
. When
s dur-
SRAM
cycle
, all
CCX