WM8951L Wolfson Microelectronics plc, WM8951L Datasheet - Page 36
WM8951L
Manufacturer Part Number
WM8951L
Description
Stereo ADC with Microphone Input and Clock Generator
Manufacturer
Wolfson Microelectronics plc
Datasheet
1.WM8951L.pdf
(42 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
WM8951LGEFL
Manufacturer:
Panasonic
Quantity:
350
WM8951L
w
Table 24 Register Map Description
0000111
Digital Audio
Interface
Format
0001000
Sampling
Control
0001001
Active Control
0001111
Reset Register
REGISTER
ADDRESS
5
6
7
1:0
3:2
6
7
0
1
5:2
6
7
0
8:0
BIT
OSCPD
CLKOUTPD
POWEROFF
FORMAT[1:0]
IWL[1:0]
MS
BCLKINV
USB/
NORMAL
BOSR
SR[3:0]
CLKIDIV2
CLKODIV2
ACTIVE
RESET
LABEL
0
0
1
10
10
0
0
0
0
0000
0
0
0
not reset
DEFAULT
Oscillator Power Down
1 = Enable Power Down
0 = Disable Power Down
CLKOUT power down
1 = Enable Power Down
0 = Disable Power Down
POWEROFF mode
1 = Enable POWEROFF
0 = Disable POWEROFF
Audio Data Format Select
11 = DSP Mode, frame sync + 2 data
packed words
10 = I
justified
01 = MSB-First, left justified
00 = MSB-First, right justified
Input Audio Data Bit Length Select
11 = 32 bits
10 = 24 bits
01 = 20 bits
00 = 16 bits
Master Slave Mode Control
1 = Enable Master Mode
0 = Enable Slave Mode
Bit Clock Invert
1 = Invert BCLK
0 = Don’t invert BCLK
Mode Select
1 = USB mode (250/272fs)
0 = Normal mode (256/384fs)
Base Over-Sampling Rate
USB Mode
0 = 250fs
1 = 272fs
ADC sample rate control;
See USB Mode and Normal Mode
Sample Rate sections for operation
Core Clock divider select
1 = Core Clock is MCLK divided by 2
0 = Core Clock is MCLK
CLKOUT divider select
1 = CLOCKOUT is Core Clock
divided by 2
0 = CLOCKOUT is Core Clock
Activate Interface
1 = Active
0 = Inactive
Reset Register
Writing 00000000 to register resets
device
2
S Format, MSB-First left-1
DESCRIPTION
PD Rev 4.1 December 2007
www.DataSheet4U.com
Normal Mode
0 = 256fs
1 = 384fs
Production Data
36