ADA4431-1 Analog Devices, ADA4431-1 Datasheet - Page 10

• Manufacturer Part Number: ADA4431-1
• Description: Ultralow Power SD Video Filter
• Manufacturer: Analog Devices

ADA4431-1
EVALUATION BOARD
The ADA4431-1 evaluation board allows designers to assess
the performance of the part in their particular application. The
board includes input and output SMA coaxial connectors and
75 Ω-controlled impedance signal traces. Power (2.5 V to 3.6 V)
is applied to the red V+ loop connector, and ground is connected
to the black GND loop connector.
The output signal can be configured for dc coupling or ac
coupling. When ac-coupled, two options are available: the
standard single capacitor configuration (minimum of 220 μF)
and the SAG-corrected configuration, using two smaller
capacitors (47 μF and 22 μF).
Jumper Block J2 allows the load detect feature to be evaluated
without connecting an external video load. Connecting a
jumper from the center pin to the 75 position applies a 75 Ω
load to the output and causes the LDO pin to go high.
DIS
IN
OUTPUT OPTION 1
10µF
C8
C5
0Ω
GND
DIS
+
V+
C4
0Ω
AC-COUPLED
J4
75Ω
DNI
V+
R2
R3
OUTPUT
220µF
C6
0.1µF
C9
R1
0Ω
DNI
R4
V+
LDOUT
1
3
4
2
Figure 17. Evaluation Board Schematic
+V
DIS
LDO
IN
S
LDO
0.1µF
ADA4431-1
C1
Rev. 0 | Page 10 of 12
C5
0Ω
SUBS
CAP1
C4
0Ω
GND
0.1µF
DC-COUPLED
+V
C2
Connecting the center pin to the GND position short circuits
the output, causing the ADA4431-1 to power down, and the
LDO pin to go low. If an external video load is connected to
the OUT connector, the jumper should be removed. With the
jumper removed, disconnecting the external load also causes
the ADA4431-1 to power down.
Jumper Block J4 exercises the disable pin (DIS). When a jumper
is connected from the center pin to V+, the charge pump is
enabled. Connecting the center pin to GND forces the ADA4431-1
into low power mode. With the jumper removed, the ADA4431-1
is enabled but the charge pump is disabled.
A schematic of the ADA4431-1 evaluation board, with output
coupling options, is shown in Figure 17. Figure 18 and Figure 19
show the front and back layout of the evaluation board.
OUTPUT
S
12
11
10
9
C6
0Ω
75Ω
R5
C3
1.0µF
C7
0.1µF
GND
75Ω
LD2
J2
WITH SAG CORRECTION
AC-COUPLED OUTPUT
OUTPUT OPTION 2
SUBS
V+
R6
75Ω
47µF
C5
GND
C4
22µF
0Ω
OUT
C6