AT91SAM7S256 ATMEL Corporation, AT91SAM7S256 Datasheet - Page 27

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AT91SAM7S256

Manufacturer Part Number
AT91SAM7S256
Description
AT91 ARM THUMB-BASED MICROCONTROLLERS
Manufacturer
ATMEL Corporation
Datasheet

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Two-wire Interface
USART
Serial Synchronous
Controller
Timer Counter
6117AS–ATARM–20-Oct-04
Master Mode only
Compatibility with standard two-wire serial memories
One, two or three bytes for slave address
Sequential read/write operations
Programmable Baud Rate Generator
5- to 9-bit full-duplex synchronous or asynchronous serial communications
RS485 with driver control signal
ISO7816, T = 0 or T = 1 Protocols for interfacing with smart cards
IrDA modulation and demodulation
Test Modes
Provides serial synchronous communication links used in audio and telecom
applications
Contains an independent receiver and transmitter and a common clock divider
Offers a configurable frame sync and data length
Receiver and transmitter can be programmed to start automatically or on detection
of different event on the frame sync signal
Receiver and transmitter include a data signal, a clock signal and a frame
synchronization signal
Three 16-bit Timer Counter Channels
Wide range of functions including:
Selectable mode fault detection
Maximum frequency at up to Master Clock
1, 1.5 or 2 stop bits in Asynchronous Mode
1 or 2 stop bits in Synchronous Mode
Parity generation and error detection
Framing error detection, overrun error detection
MSB or LSB first
Optional break generation and detection
By 8 or by 16 over-sampling receiver frequency
Hardware handshaking RTS - CTS
Modem Signals Management DTR-DSR-DCD-RI on USART1
Receiver time-out and transmitter timeguard
Multi-drop Mode with address generation and detection
NACK handling, error counter with repetition and iteration limit
Communication at up to 115.2 Kbps
Remote Loopback, Local Loopback, Automatic Echo
Three output compare or two input capture
Frequency measurement
Event counting
Interval measurement
AT91SAM7S256 Summary Preliminary
27

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