AT91SAM9261S ATMEL Corporation, AT91SAM9261S Datasheet

AT91SAM9261S

Manufacturer Part Number

AT91SAM9261S

Description

AT91 ARM Thumb-based Microcontrollers

Manufacturer

ATMEL Corporation

Datasheet

1.AT91SAM9261S.pdf (39 pages)

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Features

•

Incorporates the ARM926EJ-S™ ARM

Additional Embedded Memories

External Bus Interface (EBI)

LCD Controller

USB

Bus Matrix

Fully Featured System Controller (SYSC) for Efficient System Management, including

Reset Controller (RSTC)

Shutdown Controller (SHDWC)

Clock Generator (CKGR)

Power Management Controller (PMC)

– DSP Instruction Extensions

– ARM Jazelle

– 16 Kbyte Data Cache, 16 Kbyte Instruction Cache, Write Buffer

– 210 MIPS at 190 MHz

– Memory Management Unit

– EmbeddedICE

– Mid-level implementation Embedded Trace Macrocell

– 32 Kbytes of Internal ROM, Single-cycle Access at Maximum Bus Speed

– 16 Kbytes of Internal SRAM, Single-cycle Access at Bus Speed

– Supports SDRAM, Static Memory, NAND Flash and CompactFlash

– Supports Passive or Active Displays

– Up to 16-bits per Pixel in STN Color Mode

– Up to 16M Colors in TFT Mode (24-bit per Pixel), Resolution up to 2048 x 2048

– USB 2.0 Full Speed (12 Mbits per second) Host Double Port

– USB 2.0 Full Speed (12 Mbits per second) Device Port

– Handles Five Masters and Five Slaves

– Boot Mode Select Option

– Remap Command

– Reset Controller, Shutdown Controller, Four 32-bit Battery Backup Registers for a

– Clock Generator and Power Management Controller

– Advanced Interrupt Controller and Debug Unit

– Periodic Interval Timer, Watchdog Timer and Real-time Timer

– Three 32-bit PIO Controllers

– Based on Power-on Reset Cells, Reset Source Identification and Reset Output

– Programmable Shutdown Pin Control and Wake-up Circuitry

– 32,768 Hz Low-power Oscillator on Battery Backup Power Supply, Providing a

– 3 to 20 MHz On-chip Oscillator and two PLLs

– Very Slow Clock Operating Mode, Software Programmable Power Optimization

– Four Programmable External Clock Signals

Total of 16 Bytes

Control

Permanent Slow Clock

Capabilities

• Dual On-chip Transceivers

• Integrated FIFOs and Dedicated DMA Channels

• On-chip Transceiver, 2 Kbyte Configurable Integrated FIFOs

Technology for Java

™

, Debug Communication Channel Support

Thumb

Acceleration

Processor

™

AT91 ARM

Thumb-based

Microcontrollers

AT91SAM9261S

Summary

6242DS–ATARM–06-Jan-09

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