AT93C56A-10SE-2.7 ATMEL Corporation, AT93C56A-10SE-2.7 Datasheet
AT93C56A-10SE-2.7
Related parts for AT93C56A-10SE-2.7
AT93C56A-10SE-2.7 Summary of contents
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... The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operations are essential. The AT93C56A/66A is available in space-saving 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead MAP, 8-lead TSSOP, and 8-ball dBGA2™ packages. Pin Configurations ...
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... DC Output Current........................................................ 5.0 mA Block Diagram 2 The AT93C56A/66A is enabled through the Chip Select pin (CS) and accessed via a 3-wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift Clock (SK). Upon receiving a READ instruction at DI, the address is decoded and the data is clocked out serially on the data output pin DO. The WRITE cycle is completely self- timed and no separate ERASE cycle is required before WRITE ...
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Pin Capacitance Applicable over recommended operating range from T Symbol Test Conditions C Output Capacitance (DO) OUT C Input Capacitance (CS, SK, DI) IN Note: 1. This parameter is characterized and is not 100% tested. DC Characteristics Applicable over ...
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AC Characteristics Applicable over recommended operating range from TTL Gate and 100 pF (unless otherwise noted). Symbol Parameter SK Clock f SK Frequency t SK High Time SKH t SK Low Time SKL Minimum CS t ...
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... DO. Output data changes are synchronized with the rising edges of serial clock SK. It should be noted that a dummy bit (logic “0”) precedes the 8- or 16-bit data output string. The AT93C56A/66A supports sequential read operations. The device will automatically increment the inter- nal address pointer and clock out the next memory location as long as Chip Select (CS) is held high. In this case, the dummy bit (logic “ ...
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Timing Diagrams Synchronous Data Timing Note: 1. This is the minimum SK period. 6 WRITE (WRITE): The Write (WRITE) instruction contains the bits of data to be written into the specified memory location. The self-timed programming cycle ...
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... READ Timing High Impedance EWEN Timing 3378F–SEEPR–04/04 Organization Key for Timing Diagrams AT93C56A (2K Notes DON’T CARE value, but the extra clock is required DON’T CARE value, but the extra clock is required. ...
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EWDS Timing WRITE Timing HIGH IMPEDANCE DO (1) WRAL Timing HIGH IMPEDANCE O Note: 1. Valid only 4.5V to 5.5V ... 0 0 ...
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ERASE Timing HIGH IMPEDANCE DO (1) ERAL Timing HIGH IMPEDANCE DO Note: 1. Valid only 4.5V to 5.5V. CC 3378F–SEEPR–04/ ... N N-1 ...
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... AT93C56AY1-10YI-1.8 AT93C56A-10SU-2.7 AT93C56A-10SU-1.8 AT93C56A-10TU-2.7 AT93C56A-10TU-1.8 AT93C56A-10SQ-2.7 AT93C56A-10SE-2.7 Note: For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC characteristics table. 8P3 8-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8S1 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8S2 8-lead, 0.200" ...
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AT93C66A Ordering Information Ordering Code AT93C66A-10PI-2.7 AT93C66A-10SI-2.7 AT93C66AW-10SI-2.7 AT93C66A-10TI-2.7 AT93C66AU3-10UI-2.7 AT93C66AY1-10YI-2.7 AT93C66A-10PI-1.8 AT93C66A-10SI-1.8 AT93C66AW-10SI-1.8 AT93C66A-10TI-1.8 AT93C66AU3-10UI-1.8 AT93C66AY1-10YI-1.8 AT93C66A-10SU-2.7 AT93C66A-10SU-1.8 AT93C66A-10TU-2.7 AT93C66A-10TU-1.8 AT93C66A-10SQ-2.7 AT93C66A-10SE-2.7 Note: For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in ...
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Packaging Information 8P3 – PDIP Top View PLCS Side View Notes: 1. This drawing is for general information only; refer to JEDEC Drawing MS-001, Variation BA for additional information. 2. Dimensions A and L are measured ...
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JEDEC SOIC e Side View Note: These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R 3378F–SEEPR–04/04 1 ...
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EIAJ SOIC 1 N Top View e D Side View Notes: 1. This drawing is for general information only; refer to EIAJ Drawing EDR-7320 for additional information. 2. Mismatch of the upper and lower dies and resin burrs ...
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TSSOP Pin 1 indicator this corner N Top View Side View Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances, datums, ...
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PIN 1 BALL PAD CORNER Top View PIN 1 BALL PAD CORNER 1 2 (d1 (e1) Bottom View 8 SOLDER BALLS 1. Dimension 'b' is measured at the maximum solder ball diameter. This ...
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MAP D E Top View Side View 2325 Orchard Parkway San Jose, CA 95131 R 3378F–SEEPR–04/ End View A SYMBOL TITLE 8Y1, 8-lead (4.90 x 3.00 mm ...
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... Fax: (81) 3-3523-7581 Disclaimer: Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibil ity for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time wit h out notice, and does not make any commitment to update the information contained herein ...