HY29LV320B Hynix Semiconductor, HY29LV320B Datasheet

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HY29LV320B

Manufacturer Part Number
HY29LV320B
Description
32 Mbit (2M x 16) Low Voltage Flash Memory
Manufacturer
Hynix Semiconductor
Datasheet

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KEY FEATURES
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Revision 1.3, May 2002
– Read, program and erase operations from
– Ideal for battery-powered applications
– 70, 80, 90 and 120 ns access time
Maximum Values)
– Automatic sleep/standby current: 0.5/5.0
– Read current: 9/16 mA (@ 5 MHz)
– Program/erase current: 20/30 mA
– Provide one 8 KW, two 4 KW, one 16 KW
– An extra 128-word, factory-lockable
– Allows locking of a sector or sectors to
– Temporary Sector Unprotect allows
– Sector erase time: 0.5 sec per sector
– Chip erase time: 32 sec
– Word program time: 11 s
– Accelerated program time per word: 7 s
and Erases Any Combination of Sectors
or the Entire Chip
Verifies Data at Specified Addresses
Interface (CFI) Specification
– Flash device parameters stored directly
– Allows software driver to identify and use a
Single Power Supply Operation
High Performance
Ultra-low Power Consumption (Typical/
Top and Bottom Boot Block Versions
Secured Sector
Sector Protection
Fast Program and Erase Times (typicals)
Automatic Erase Algorithm Preprograms
Automatic Program Algorithm Writes and
Compliant With Common Flash Memory
Minimum 100,000 Write Cycles per Sector
2.7 to 3.6 volts
versions for full voltage range operation
µA
and sixty-three 32 KW sectors
sector available for an Electronic Serial
Number and/or additional secured data
prevent program or erase operations
within that sector
changes in locked sectors
on the device
variety of current and future Flash products
32 Mbit (2M x 16) Low Voltage Flash Memory
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LOGIC DIAGRAM
– Pinout and software compatible with
– Superior inadvertent write protection
– Provide software confirmation of
– Provides hardware confirmation of
– Suspends an erase operation to allow
– Erase Resume can then be invoked to
Device to Reading Array Data
– 48-pin TSOP and 63-ball FBGA packages
Compatible With JEDEC standards
Data# Polling and Toggle Bits
Ready/Busy (RY/BY#) Pin
Write Protect Function (WP#/ACC pin)
Acceleration Function (WP#/ACC pin)
Erase Suspend/Erase Resume
Hardware Reset Pin (RESET#) Resets the
Space Efficient Packaging
2 1
single-power supply Flash devices
completion of program and erase
operations
completion of program and erase
operations
Allows hardware protection of the first or
last 32 KW of the array, regardless of sector
protect status
Provides accelerated program times
reading data from, or programming data
to, a sector that is not being erased
complete suspended erasure
A[20:0]
C E #
O E #
W E #
R E S E T #
W P # / A C C
DQ[15:0]
R Y / B Y #
HY29LV320
1 6

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HY29LV320B Summary of contents

Page 1

KEY FEATURES n Single Power Supply Operation – Read, program and erase operations from 2.7 to 3.6 volts – Ideal for battery-powered applications n High Performance – 70, 80, 90 and 120 ns access time versions for full voltage range ...

Page 2

... The HY29LV320 features a sector architecture and is offered in two versions: n HY29LV320B - a device with boot-sector archi- tecture with the boot sectors at the bottom of the address range, containing one 8KW, two 4KW, one 16KW and sixty-three 32KW sectors. ...

Page 3

Secured Sector as bo- nus space, reading and writing like any other Flash sector, or may permanently lock their own code there. The WP#/ACC pin provides two functions. The Write Protect function provides a hardware ...

Page 4

HY29LV320 SIGNAL DESCRIPTIONS ...

Page 5

PIN CONFIGURATIONS A[15] A[14] A[13] A[12] A[11] A[10] A[9] A[8] A[19] A[20 RY/BY# A[18] A[17] A[7] A[6] A[5] A[4] A[3] A[2] A[1] ...

Page 6

... Kwords. The remaining 63 sectors are sized at 32 Kwords. The boot block can be lo- cated at the bottom of the address range (HY29LV320B the top of the address range (HY29LV320T). Tables 1 and 2 define the sector addresses and corresponding array address ranges for the top and bottom boot block versions of the HY29LV320 ...

Page 7

Table 1. HY29LV320T (Top Boot Block) Memory Array Organization ...

Page 8

... HY29LV320 Table 2. HY29LV320B (Bottom Boot Block) Memory Array Organization ...

Page 9

Table 3. HY29LV320 Secure Sector Addressing ...

Page 10

HY29LV320 Table 4. HY29LV320 Normal Bus Operations ...

Page 11

... IL operations in the bottom or top 32K words of the array (the boot sectors). The affected sectors are as follows (see Tables 1 and 2): n HY29LV320B: S0 – HY29LV320T: S63 – S66 If the pin is placed the protection state of IH those sectors reverts to whether they were last ...

Page 12

HY29LV320 mode. In this mode, current consumption is greatly reduced, and the data bus outputs are placed in the high impedance state, independent of the OE# input. The Standby mode can invoked using two methods. The device enters the CE# ...

Page 13

Table 6. Sector Groups - Top Boot Version ...

Page 14

HY29LV320 Wait 1 us First Write Cycle: Write 0x60 to device TRYCNT = 1 Set Address: ...

Page 15

Table 5. The Elec- tronic ID data can also be obtained by the host through specific commands issued via the com- mand register, as described later in the ‘Device Commands’ section of this data ...

Page 16

HY29LV320 retrieve data in this mode. See Read Operation section for additional information. After the device accepts an Erase Suspend com- mand, the HY29LV320 enters the erase-suspend- read mode, after which the system can read data from any non-erase-suspended sector. ...

Page 17

Table 9. HY29LV320 Command Sequences ...

Page 18

HY29LV320 status of the programming operation, as described in the Write Operation Status section. Commands written to the device during execution of the Automatic Program algorithm are ignored. Note that a hardware reset immediately terminates the programming operation (see Reset ...

Page 19

Chip Erase Command Sequence The Chip Erase Command sequence consists of two unlock cycles, followed by a set-up command, two additional unlock cycles and then the Chip Erase Command. This sequence invokes the Automatic Chip Erase algorithm which automati- cally ...

Page 20

HY29LV320 If all sectors designated for erasing are protected, the device returns to reading array data after ap- proximately 100 µ least one designated sector is unprotected, the erase operation erases the unprotected sectors, and ignores the command ...

Page 21

The host may also write the Electronic ID Com- mand sequence when the chip is in the Erase Suspend mode. The device allows reading Elec- tronic ID codes even at addresses within erasing sectors, since the codes are not stored ...

Page 22

HY29LV320 in the Electronic ID mode when the Query com- mand was issued the Erase Suspend mode if the device was in that mode prior to entering CFI mode. The Reset command is valid only when the device ...

Page 23

Table 11. CFI Mode: System Interface Data Values ...

Page 24

HY29LV320 Table 13. CFI Mode: Vendor-Specific Extended Query Data Values " R " ...

Page 25

Table 14. Write and Erase Operation Status Summary ...

Page 26

HY29LV320 START Read DQ[7:0] at Valid Address (Note 1) Test for DQ[ for Erase Operation DQ[7] = Data? YES DQ[ YES Read DQ[7:0] at Valid Address (Note 1) Test for DQ[7] = ...

Page 27

START Read DQ[7:0] at Valid Address (Note 1) Read DQ[7:0] at Valid Address (Note DQ[6] Toggled (Note (Note 3) PROGRAM/ERASE Notes: 1. During ...

Page 28

HY29LV320 ABSOLUTE MAXIMUM RATINGS ...

Page 29

DC CHARACTERISTICS ...

Page 30

HY29LV320 DC CHARACTERISTICS Zero Power Flash 500 Note: Addresses are switching at 1 MHz. Figure 13. I Current vs. Time (Showing Active and Automatic Sleep Currents) CC1 ...

Page 31

KEY TO SWITCHING WAVEFORMS TEST CONDITIONS 6 Figure 15. Test Setup ...

Page 32

HY29LV320 AC CHARACTERISTICS Read Operations ...

Page 33

AC CHARACTERISTICS Hardware Reset (RESET ...

Page 34

HY29LV320 AC CHARACTERISTICS Program and Erase Operations ...

Page 35

Program Command Sequence (last two cycles Addresses 0x555 Data 0xA0 RY/BY ...

Page 36

HY29LV320 AC CHARACTERISTICS Erase Command Sequence (last two cycles Addresses 0x2AA Data 0x55 RY/BY# ...

Page 37

AC CHARACTERISTICS Addresses DQ[7] DQ[6: ...

Page 38

HY29LV320 AC CHARACTERISTICS Enter Automatic Erase DQ[6] DQ[2] Notes: 1. The system may use CE# or OE# to toggle DQ[2] and DQ[6]. DQ[2] toggles only when read at an address within an erase-suspended sector. Sector Protect and ...

Page 39

AC CHARACTERISTICS RESET# IH SGA, A[6], Don't Care A[1], A[0] Sector Group Protect/ Sector Unprotect Data 0x60 Note: For Sector Group Protect, A[6] ...

Page 40

HY29LV320 AC CHARACTERISTICS 0x555 for Program 0x2AA for Erase Addresses Data 0xA0 for Program ...

Page 41

Latchup Characteristics ...

Page 42

HY29LV320 PACKAGE DRAWINGS Physical Dimensions FBGA63 - 63-Ball Fine-Pitch Ball Grid Array, 7 (measurements in millimeters) Note: Unless otherwise specified, tolerance = ± 0. r1.3/May 02 ...

Page 43

ORDERING INFORMATION Hynix products are available in several speeds, packages and operating temperature ranges. The ordering part number is formed by combining a number of fields, as indicated below. Refer to the ‘Valid Combinations’ table, which lists the configurations that ...

Page 44

... HY29LV320 © 2001 by Hynix Semiconductor America. All rights reserved. No part of this document may be copied or reproduced in any form or by any means without the prior written consent of Hynix Semiconductor Inc. or Hynix Semiconductor America (collec- tively “Hynix”). The information in this document is subject to change without notice ...

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