MPC9608 Motorola Inc, MPC9608 Datasheet - Page 8

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MPC9608

Manufacturer Part Number
MPC9608
Description
1:10 LVCMOS Zero Delay Clock Buffer
Manufacturer
Motorola Inc
Datasheet

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MPC9608
cause any false clock triggering; however, designers may be
uncomfortable with unwanted reflections on the line. To better
match the impedances when driving multiple lines the situation
in Figure 7 “Optimized Dual Line Termination” should be used.
In this case the series terminating resistors are reduced such
that when the parallel combination is added to the output buffer
impedance the line impedance is perfectly matched.
8
3.0
2.5
2.0
1.5
1.0
0.5
0
Since this step is well above the threshold region, it will not
Figure 6. Single versus Dual Waveforms
t
D
2
= 3.8956
OutA
In
4
Generator
Z = 50
Pulse
6
TIME (nS)
t
D
= 3.9386
OutB
8
Figure 8. CCLK MPC9608 AC test reference for V
Freescale Semiconductor, Inc.
10
For More Information On This Product,
12
R
Z
T
O
= 50
= 50
Go to: www.freescale.com
14
V
TT
MPC9608 DUT
MPC9608
Figure 7. Optimized Dual Line Termination
OUTPUT
BUFFER
14
Z
14
O
= 50
CC
+ 22
R
= 3.3 V
T
= 50
25
R
R
S
S
= 22
= 22
22
= 25
V
TT
= 50
Z
Z
O
O
= 50
= 50
50
TIMING SOLUTIONS

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