ADC0820BCWM National Semiconductor, ADC0820BCWM Datasheet - Page 12

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ADC0820BCWM

Manufacturer Part Number
ADC0820BCWM
Description
8-Bit High Speed P Compatible A/D Converter with Track/Hold Function
Manufacturer
National Semiconductor
Datasheet

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1.0 Functional Description
Note: MS means most significant
LS means least significant
OTHER INTERFACE CONSIDERATIONS
In order to maintain conversion accuracy, WR has a maxi-
mum width spec of 50 µs. When the MS flash ADC’s
sampled-data comparators (Section 1.2) are in comparison
mode (WR is low), the input capacitors (C, Figure 8 ) must
hold their charge. Switch leakage and inverter bias current
can cause errors if the comparator is left in this phase for too
long.
FIGURE 11. Operating Sequence (WR-RD Mode)
(Continued)
12
Since the MS flash ADC enters its zeroing phase at the end
of a conversion (Section 1.3), a new conversion cannot be
started until this phase is complete. The minimum spec for
this time (t
P
, Figures 2, 3, 4, 5 ) is 500 ns.
DS005501-20

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