ADC12181 National Semiconductor, ADC12181 Datasheet

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ADC12181

Manufacturer Part Number
ADC12181
Description
12-Bit/ 10 MHz Self-Calibrating/ Pipelined A/D Converter with Internal Sample & Hold
Manufacturer
National Semiconductor
Datasheet
© 2002 National Semiconductor Corporation
ADC12181
12-Bit, 10 MHz Self-Calibrating, Pipelined A/D Converter
with Internal Sample & Hold
General Description
The ADC12181 is a monolithic CMOS analog-to-digital con-
verter capable of converting analog input signals into 12-bit
digital words at 10 megasamples per second (MSPS). The
ADC12181 utilizes an innovative pipeline architecture to
minimize die size and power consumption. Self-calibration
and error correction maintain accuracy and performance
over temperature.
The ADC12181 converter operates on a 5V power supply
and can digitize analog input signals in the range of 0 to 2V.
A single convert clock controls the conversion operation. All
digital I/O is TTL compatible.
The ADC12181 is designed to minimize external compo-
nents necessary for the analog input interface. An internal
sample-and-hold circuit samples the analog input and an
internal amplifier buffers the reference voltage input.
The ADC12181 is available in the 32-lead TQFP package
and is designed to operate over the extended commercial
temperature range of -40˚C to +85˚C.
Features
n Single 5V power supply
n Simple analog input interface
Connection Diagram
Ordering Information
ADC12181CIVT
(−40˚C ≤ TA ≤ +85˚C)
DS101039
Industrial
n Internal Sample-and-hold
n Internal Reference buffer amplifier
n Low power consumption
Key Specifications
n Resolution
n Conversion Rate
n DNL
n SNR
n ENOB
n Analog Input Range
n Supply Voltage
n Power Consumption, 10 MHz
Applications
n Image processing front end
n PC-based data acquisition
n Scanners
n Fax machines
n Waveform digitizer
32 pin TQFP
Package
10103901
November 2002
±
10 Msps (min)
10.4 Bits (typ)
235 mW (typ)
www.national.com
0.4 LSB (typ)
2 Vpp (min)
65 dB (typ)
+5V
12 Bits
±
5%

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ADC12181 Summary of contents

Page 1

... An internal sample-and-hold circuit samples the analog input and an internal amplifier buffers the reference voltage input. The ADC12181 is available in the 32-lead TQFP package and is designed to operate over the extended commercial temperature range of -40˚C to +85˚C. ...

Page 2

... Ordering Information ADC12181 EVAL Simplified Block Diagram www.national.com (Continued) Industrial (−40˚C ≤ TA ≤ +85˚C) Evaluation Board 2 Package 10103902 ...

Page 3

Pin Descriptions and Equivalent Circuits #2 No. Symbol Equivalent Circuit REF CLOCK 8 CAL READY Description Analog signal ...

Page 4

... The ground return for the analog supply. AGND and DGND should be connected together close to the ADC12181 package. See section 5.0. Positive analog supply pin. Connect to a clean, quiet voltage source of +5V. V common supply and be separately bypassed with a 5µ ...

Page 5

... Absolute Maximum Ratings 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage Voltage on Any Output Input Current at Any Pin (Note 3) Package Input Current (Note 3) Package Dissipation ESD Susceptibility Human Body Model Machine Model Soldering Temp ...

Page 6

DC and Logic Electrical Characteristics The following specifications apply for AGND = DGND = DGND I 10MHz pF/pin. After Auto-Cal at Temperature. Boldface limits apply for T CLK ...

Page 7

... TTL output loading). The values for maximum power consumption listed above will be reached only when the ADC12181 is operated in a severe fault condition (e.g. when input or output pins are driven beyond the power supply voltages, or the power supply polarity is reversed). Obviously, such conditions should always be avoided. Note 5: Human body model is 100 pF capacitor discharged through a 1.5kΩ ...

Page 8

Transfer Characteristics Typical Performance Characteristics INL vs Temperature www.national.com FIGURE 1. Transfer Characteristic FIGURE 2. Errors Minimized by the Auto-Cal Cycle 10103911 8 10103909 10103910 DNL vs Temperature 10103912 ...

Page 9

Typical Performance Characteristics SNR vs Temperature (Continued) 10103913 THD vs Temperature 10103915 10103917 9 SINAD vs Temperature 10103914 10103916 www.national.com ...

Page 10

Specification Definitions APERTURE JITTER is the variation in aperture delay from sample to sample. Aperture jitter shows up as input noise. APERTURE DELAY See Sampling Delay. CLOCK DUTY CYCLE is the ratio of the time that the clock waveform is ...

Page 11

Timing Diagrams FIGURE 3. Data Output Timing 11 10103921 www.national.com ...

Page 12

... INCOM analog ground. 2.0 DIGITAL INPUTS The ADC12181 has four digital inputs. They are CLOCK, CAL, OE and PD. 2.1 CLOCK The CLOCK signal drives an internal phase delay loop to create timing for the ADC. The clock input should be driven with a stable, low phase jitter TTL level clock signal in the range MHz ...

Page 13

... V I/O is the power pin for the output driver. This pin may be D supplied with a potential between 2.7V and V it easy to interface the ADC12181 with logic fami- lies. Powering the V consumption and noise generation due to output switching. DO NOT operate the All power supplies connected to the device should be A applied simultaneously ...

Page 14

... To prevent this from hap- pening, the DGND I/O pin should NOT be connected in close proximity to any of the ADC12181’s other ground pins. Capacitive coupling between the typically noisy digital ground plane and the sensitive analog circuitry can lead to poor performance that may seem impossible to isolate and remedy ...

Page 15

... The ADC12181 can achieve impressive dynamic perfor- mance. To achieve the best dynamic performance with the ADC12181, the clock source driving the CLK input must be free of jitter. For best ac performance, isolating the ADC clock from any digital circuitry should be done with adequate buffers, as with a clock tree ...

Page 16

... Using an inadequate amplifier to drive the analog input. The analog input circuits of the ADC12181 place a switched capacitor load on the input signal source. Therefore the amplifier used to drive the ADC12181 must have a low impedance output and adequate bandwidth to avoid distor- tion of the input signal. ...

Page 17

... National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. inches (millimeters) 32-Lead TQFP Package Ordering Number ADC12181CIVT NS Package Number VBE32A 2. A critical component is any component of a life ...

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