MD4331-d1G-MECH M-Systems Inc., MD4331-d1G-MECH Datasheet - Page 57
MD4331-d1G-MECH
Manufacturer Part Number
MD4331-d1G-MECH
Description
Mobile Diskonchip G3 Data Sheet
Manufacturer
M-Systems Inc.
Datasheet
1.MD4331-D1G-MECH.pdf
(96 pages)
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8.8
Description:
Address (hex): 100C/1072
Note: The DiskOnChip Control Confirmation register is write only
54
Read/Write
Description
Reset Value
Bit No.
1-0
7-5
2
3
4
DiskOnChip Control Register/Control Confirmation Register
Mode. These bits select the mode of operation, as follows:
00: Reset
01: Normal
10: Deep Power-Down
MDWREN (Mode Write Enable). This bit must be set to 1 before changing the mode of
operation. It always returns 0 when read.
BDET (Boot Detect). This bit is set whenever the device has entered Reset mode as a
result of the Boot Detector triggering. It is cleared by writing a 1 to this bit.
RST_LAT (Reset Latch). This bit is set whenever the device has entered the Reset mode
as a result of the RSTIN# input signal being asserted or the internal voltage detector
triggering. It is cleared by writing a 1 to this bit.
Reserved for future use.
These two registers are identical and contain information about the Mobile
DiskOnChip G3 operational mode. After writing the required value to the
DiskOnChip Control register, the complement of that data byte must also be
written to the Control Confirmation register. The two writes cycles must not be
separated by any other read or write cycles to the Mobile DiskOnChip G3
memory space, except for reads from the Programmable Boot Block space.
Bit 7
0
Mode[1:0]
Bit 6
0
MDWREN
Bit 5
R/W
Data Sheet, Rev. 1.0
0
BDET
Bit 4
Description
0
RST_LAT
Bit 3
1
Bit 2
0
RFU_0
Bit 1
Mobile DiskOnChip G3
R
0
91-SR-011-05-8L
Bit 0
0
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