PIC16C62B Microchip Technology, PIC16C62B Datasheet - Page 14

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PIC16C62B

Manufacturer Part Number
PIC16C62B
Description
28-Pin 8-Bit CMOS Microcontrollers
Manufacturer
Microchip Technology
Datasheet

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PIC16C62B/72A
2.2.2.4
This register contains the individual enable bits for the
peripheral interrupts.
FIGURE 2-6:
DS35008A-page 14
bit7
bit 7:
bit 6:
bit 5-4: Unimplemented: Read as ‘0’
bit 3:
bit 2:
bit 1:
bit 0:
Note 1: The PIC16C62B does not have an A/D module. This bit location is reserved on these devices. Always maintain this
U-0
PIE1 REGISTER
Unimplemented: Read as ‘0’
ADIE
1 = Enables the A/D interrupt
0 = Disables the A/D interrupt
SSPIE: Synchronous Serial Port Interrupt Enable bit
1 = Enables the SSP interrupt
0 = Disables the SSP interrupt
CCP1IE: CCP1 Interrupt Enable bit
1 = Enables the CCP1 interrupt
0 = Disables the CCP1 interrupt
TMR2IE: TMR2 to PR2 Match Interrupt Enable bit
1 = Enables the TMR2 to PR2 match interrupt
0 = Disables the TMR2 to PR2 match interrupt
TMR1IE: TMR1 Overflow Interrupt Enable bit
1 = Enables the TMR1 overflow interrupt
0 = Disables the TMR1 overflow interrupt
bit clear.
ADIE
R/W-0
(1)
PIE1 REGISTER (ADDRESS 8Ch)
(1)
: A/D Converter Interrupt Enable bit
U-0
U-0
SSPIE
R/W-0
Preliminary
CCP1IE
R/W-0
TMR2IE
R/W-0
Note:
TMR1IE
Bit PEIE (INTCON<6>) must be set to
enable any peripheral interrupt.
R/W-0
bit0
R = Readable bit
W = Writable bit
U = Unimplemented bit,
- n = Value at POR reset
1998 Microchip Technology Inc.
read as ‘0’

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