74ABT16652CSSCX Fairchild Semiconductor, 74ABT16652CSSCX Datasheet - Page 6
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74ABT16652CSSCX
Manufacturer Part Number
74ABT16652CSSCX
Description
IC TRANSCVR TRI-ST 16BIT 56SSOP
Manufacturer
Fairchild Semiconductor
Series
74ABTr
Datasheet
1.74ABT16652CMTD.pdf
(9 pages)
Specifications of 74ABT16652CSSCX
Logic Type
Transceiver, Non-Inverting
Number Of Elements
2
Number Of Bits Per Element
8
Current - Output High, Low
32mA, 64mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
56-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
www.fairchildsemi.com
t
t
t
t
t
t
t
t
t
t
(Note 14)
(Note 14)
(Note 15)
(Note 14)
(Note 16)
PLH
PHL
PLH
PHL
PLH
PHL
PZH
PZL
PHZ
PLZ
t
t
t
t
t
Extended AC Electrical Characteristics
(SSOP Package)
Note 8: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase
(i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.).
Note 9: This specification is guaranteed but not tested. The limits represent propagation delay with 250 pF load capacitors in place of the 50 pF load
capacitors in the standard AC load. This specification pertains to single output switching only.
Note 10: This specification is guaranteed but not tested. The limits represent propagation delays for all paths described switching in phase
(i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.) with 250 pF load capacitors in place of the 50 pF load capacitors in the standard AC load.
Note 11: The 3-STATE delay times are dominated by the RC network (500 , 250 pF) on the output and has been excluded from the datasheet.
Skew
(SSOP Package)
Note 12: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase
(i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.).
Note 13: This specification is guaranteed but not tested. The limits represent propagation delays with 250 pF load capacitors in place of the 50 pF load
capacitors in the standard AC load.
Note 14: Skew is defined as the absolute value of the difference between the actual propagation delays for any two separate outputs of the same device.
The specification applies to any outputs switching HIGH to LOW (t
LOW (t
Note 15: This describes the difference between the delay of the LOW-to-HIGH and the HIGH-to-LOW transition on the same pin. It is measured across all
the outputs (drivers) on the same chip, the worst (largest delta) number is the guaranteed specification. This specification is guaranteed but not tested.
Note 16: Propagation delay variation for a given set of conditions (i.e., temperature and V
tested.
OSHL
OSLH
PS
OST
PV
Symbol
Symbol
OST
). This specification is guaranteed but not tested.
(Note 12)
Progagation Delay
Clock to Bus
Progagation Delay
Bus to Bus
Progagation Delay
SBA or SAB to
A
Output Enable Time
OEBA
A
Output Disable Time
OEBA or OEAB to
A
Pin to Pin Skew
HL Transitions
Pin to Pin Skew
LH Transitions
Duty Cycle
LH–HL Skew
Pin to Pin Skew
LH/HL Transitions
Device to Device Skew
LH/HL Transitions
n
n
n
or B
or B
or B
n
n
n
n
or OEAB
Parameter
Parameter
n
to
16 Outputs Switching
T
A
V
Min
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
OSHL
CC
C
40 C to 85 C
(Note 8)
16 Outputs Switching
L
T
), LOW to HIGH (t
A
4.5V–5.5V
V
50 pF
CC
C
(Note 12)
40 C to 85 C
L
6
Max
Max
5.8
6.5
6.0
6.0
5.8
6.5
6.0
6.0
6.0
6.0
4.5V–5.5V
2.0
2.0
2.0
2.8
3.5
50 pF
OSLH
CC
T
1 Output Switching
) from device to device. This specification is guaranteed but not
A
V
Min
2.0
2.0
2.0
2.0
2.0
2.0
2.0
2.0
), or any combination switching LOW to HIGH and/or HIGH to
CC
C
(Note 11)
40 C to 85 C
L
(Note 9)
4.5V–5.5V
250 pF
Max
7.5
7.5
7.0
7.0
7.5
7.5
8.0
8.0
16 Outputs Switching
T
A
V
CC
C
(Note 13)
40 C to 85 C
L
16 Outputs Switching
T
Max
4.5V–5.5V
2.5
2.5
2.5
3.0
4.0
A
250 pF
V
Min
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
CC
C
(Note 10)
(Note 11)
L
40 C to 85 C
4.5V–5.5V
250 pF
Max
10.0
10.0
10.0
10.0
10.5
10.5
9.5
9.5
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns