DS3510 Maxim Integrated Products, DS3510 Datasheet - Page 16

• Manufacturer Part Number: DS3510
• Manufacturer: Maxim Integrated Products

EEPROM write cycles: The DS3510’s EEPROM write
cycles are specified in the Nonvolatile Memory
Characteristics table. The specification shown is at the
worst-case temperature (hot) as well as at room tem-
perature.
Reading a single byte from a slave: Unlike the write
operation that uses the specified memory address byte
to define where the data is to be written, the read opera-
tion occurs at the present value of the memory address
counter. To read a single byte from the slave, the master
generates a START condition, writes the slave address
byte with R/W = 1, reads the data byte with a NACK to
indicate the end of the transfer, and generates a STOP
condition. However, since requiring the master to keep
track of the memory address counter is impractical, the
following method should be used to perform reads from
a specified memory location.
I
Figure 6. I
16
2
A)
B)
C)
D)
E)
TYPICAL I
EXAMPLE I
START
SINGLE-BYTE WRITE
-WRITE LATCH A
SINGLE-BYTE READ
-READ LATCH A GM2
SINGLE-BYTE WRITE
-ENTER STANDBY MODE
TWO-BYTE WRITE
- WRITE 10h AND 11h TO 80h
TWO-BYTE READ
- READ 10h AND 11h
C Gamma and V
GM8 TO 00h
______________________________________________________________________________________
2
C WRITE TRANSACTION
2
MSB
C TRANSACTIONS (WHEN A0 IS CONNECTED TO GND)
1
2
C Communication Examples
1
0
ADDRESS*
SLAVE
0
0
START
START
START 1 1 0 0 0 0 0 0
START 1 1 0 0 0 0 0 0
START 1 1 0 0 0 0 0 0
0
1 1 0 0 0 0 0 0
1 1 0 0 0 0 0 0
A0
C0h
C0h
C0h
C0h
C0h
WRITE
READ/
LSB
R/W
SLAVE
ACK
SLAVE
SLAVE
SLAVE
SLAVE
SLAVE
ACK
ACK
ACK
ACK
ACK
MSB
b7
0 0 0 0 1 0 0 0
0 0 0 0 0 0 1 0
0 1 0 1 0 0 0 1
0 0 0 1 0 0 0 0
0 0 0 1 0 0 0 0
COM
b6
08h
02h
10h
10h
51h
b5
REGISTER ADDRESS
*THE SLAVE ADDRESS IS DETERMINED BY ADDRESS PIN A0.
b4
SLAVE
SLAVE
SLAVE
SLAVE
SLAVE
ACK
ACK
ACK
ACK
ACK
b3
Buffer with EEPROM
0 0 0 0 0 0 0 1
1 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
REPEATED
REPEATED
b2
START
START
01h
80h
OOh
Manipulating the address counter for reads: A
dummy write cycle can be used to force the address
counter to a particular value. To do this the master gen-
erates a START condition, writes the slave address
byte (R/W = 0), writes the memory address where it
desires to read, generates a repeated START condi-
tion, writes the slave address byte (R/W = 1), reads
data with ACK or NACK as applicable, and generates a
STOP condition. Recall that the master must NACK the
last byte to inform the slave that no additional bytes will
be read.
See Figure 6 for I
Reading multiple bytes from a slave: The read opera-
tion can be used to read multiple bytes with a single
transfer. When reading bytes from the slave, the master
simply ACKs the data byte if it desires to read another
byte before terminating the transaction. After the mas-
ter reads the last byte, it must NACK to indicate the end
of the transfer and generates a STOP condition.
b1
LSB
1 1 0 0 0 0 0 1
b0
1 1 0 0 0 0 0 1
SLAVE
SLAVE
SLAVE
ACK
ACK
ACK
C1h
C1h
SLAVE
ACK
STOP
1 0 0 0 0 0 0 0
STOP
MSB
b7
SLAVE
80h
ACK
SLAVE
ACK
b6
2
C communication examples.
I/O STATUS
b5
DATA
SLAVE
ACK
DATA
b4
DATA
b3
STOP
MASTER
NACK
MASTER
b2
ACK
b1
STOP
LSB
b0
DATA
SLAVE
ACK
MASTER
NACK
STOP
STOP