DS3903 Maxim Integrated Products, DS3903 Datasheet - Page 8

no-image

DS3903

Manufacturer Part Number
DS3903
Description
DS3903 Triple 128-Position Nonvolatile Digital Potentiometer
Manufacturer
Maxim Integrated Products
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DS3903
Manufacturer:
DS
Quantity:
20 000
Part Number:
DS3903E-020
Manufacturer:
MAXIM/美信
Quantity:
20 000
Part Number:
DS3903E-020+
Manufacturer:
IDT
Quantity:
776
Part Number:
DS3903E-020+
Manufacturer:
MAXIM/美信
Quantity:
20 000
Part Number:
DS3903E-020+T&R
Manufacturer:
MAXIM
Quantity:
14
Part Number:
DS3903E-20
Manufacturer:
MAXIM/美信
Quantity:
20 000
Triple 128-Position Nonvolatile
Digital Potentiometer
Figure
Figure
word consists of 101000 binary followed by A0 then the
R/W bit. If the R/W bit is high, a read operation is initiat-
ed. If the R/W bit is low, a write operation is initiated.
For a device to become active, the value of A0 must be
the same as the hard-wired address pins on the
DS3903. Upon a match of written and hard-wired
addresses, the DS3903 outputs a zero for one clock
cycle as an acknowledge. If the address does not
match, the DS3903 returns to a low-power mode.
8
SDA
SCL
SDA
SCL
______________________________________________________________________
CONDITION
2. 2-Wire Data Transfer Protocol
3. 2-Wire AC Characteristics
START
STOP
t
BUF
START
MSB
1
t
HD:STA
2
t
SLAVE ADDRESS
LOW
6
t
R
t
HD:DAT
7
DIRECTION
t
F
R/W
BIT
t
HIGH
8
SIGNAL FROM RECEIVER
ACKNOWLEDGEMENT
t
SU:DAT
ACK
9
After receiving a matching device address byte with the
R/W bit set low, the device goes into the write mode of
operation. The master must transmit an 8-bit EEPROM
memory address to the device to define the address
where the data is to be written. After the byte has been
received, the DS3903 transmits a zero for one clock
cycle to acknowledge the memory address has been
received. The master must then transmit an 8-bit data
word to be written into this memory address. The
DS3903 again transmits a zero for one clock cycle to
acknowledge the receipt of the data byte. At this point,
the master must terminate the write operation with a stop
condition. The DS3903 then enters an internally timed
REPEATED
START
1
t
SU:STA
t
HD:STA
2
REPEATED IF MORE BYTES
ARE TRANSFERRED
3–7
SIGNAL FROM RECEIVER
ACKNOWLEDGEMENT
8
ACK
9
t
SP
Write Operations
OR REPEATED
CONDITION
CONDITION
t
SU:STO
START
STOP

Related parts for DS3903