SDA9220-5 Infineon Technologies Corporation, SDA9220-5 Datasheet - Page 4

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SDA9220-5

Manufacturer Part Number
SDA9220-5
Description
Memory SYNC Controller Iii
Manufacturer
Infineon Technologies Corporation
Datasheet

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The standard conversion (SC) function can be activated via pin NW
The following functions can be set on the I
Semiconductor Group
1)
2) I
The following correlation exists:
Low level at pin NW:
High level at pin NW:
If the standard conversion is switched on, there is a 100-(120-) Hz field frequency in the 50-
(60)-Hz standard.
Field sequence with SC:
Field sequence without SC:
Still
Field sequence with SC and interlace:
Field sequence with SC and without interlace:
Field sequence without SC and without interlace:
Teletext text mode:
Teletext mixed mode:
with SC
without SC
Teletext field mode:
HS2 phase:
Write operation delay owing to delay in the picture processor for noise reduction can be set
between 0 and 14 or 16 and 30 LL3X clocks.
When the color frame is used, the picture-in-picture and multi-picture modes have to be activated
without the software frame because the two are not identical.
The picture-in-picture and multi-picture modes cannot be switched on in the field mode; there
may otherwise be no gray backing for the frame function, depending on the field. The field mode
can only be activated one field after the picture-in-picture or multi-picture mode.
Field content
2
C Bus: Bus system patented by Philips
A( )
Vertical sync phase referred to horizontal sync pulse (raster)
or: A
A
A
A
In this mode every second field is written to the field memory.
The display raster is freely selectable. Although the vertical
resolution of the TV picture is slightly less in this mode, the
lack of background edge flicker improves the visual effect in
teletext mixed mode. An improvement in the picture can also
be achieved with VCR signals in the special modes. It is also
possible to select a particular field; this is useful for specific
requests.
Programmable between 0 and 32 s in increments of approx.
300 ns (for delay equalization between picture generation and
deflection).
Mode without standard conversion
Mode with standard conversion
A( ) A( )
A( )
VT
VT
VT
VT
( ) A
( ) A
( ) A
( )
VT
VT
VT
2
C Bus
120
( ) A
( ) A
( ) A
A
VT
VT
VT
VT
B( ) B( )
B( )
or B( ) B( ) B( ) B( )
or B( ) B( ) B( ) B( )
or B( ) B( )
2)
( ) A
( ) A
( )
( ) A
A( ) A( ) A( ) A( )
A( ) A( ) A( ) A( )
A( ) A( )
interface:
VT
VT
VT
( )
( )
( )
1)
SDA 9220-5

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