PIC16C923-04I/CL Microchip Technology, PIC16C923-04I/CL Datasheet - Page 60

• Manufacturer Part Number: PIC16C923-04I/CL
• Description: 8-Bit CMOS Microcontroller with LCD Driver
• Manufacturer: Microchip Technology

PIC16C9XX
10.3.2
The PWM duty cycle is specified by writing to the
CCPR1L register and to the CCP1CON<5:4> bits. Up
to 10-bit resolution is available: the CCPR1L contains
the eight MSbs and CCP1CON<5:4> contains the two
LSbs.
CCPR1L:CCP1CON<5:4>. The following equation is
used to calculate the PWM duty cycle in time:
CCPR1L and CCP1CON<5:4> can be written to at any
time, but the duty cycle value is not latched into
CCPR1H until after a match between PR2 and TMR2
occurs (i.e., the period is complete). In PWM mode,
CCPR1H is a read-only register.
The CCPR1H register and a 2-bit internal latch are
used to double buffer the PWM duty cycle. This double
buffering is essential for glitchless PWM operation.
When the CCPR1H and 2-bit latch match TMR2 con-
catenated with an internal 2-bit Q clock or 2 bits of the
TMR2 prescaler, the CCP1 pin is cleared.
Maximum PWM resolution (bits) for a given PWM fre-
quency:
TABLE 10-2: EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 8 MHz
DS30444E - page 60
PR2 Value
Timer Prescaler (1, 4, 16)
Maximum Resolution (bits)
Note:
Note:
PWM duty cycle = (CCPR1L:CCP1CON<5:4>) •
This
PWM DUTY CYCLE
The Timer2 postscaler (Section 9.0) is not
used in the determination of the PWM fre-
quency. The postscaler could be used to
have a servo update rate at a different fre-
quency than the PWM output.
If the PWM duty cycle value is longer than
the PWM period the CCP1 pin will not be
cleared.
PWM Frequency
=
10-bit
log
Tosc • (TMR2 prescale value)
log(2)
(
value
F
F
PWM
OSC
)
is
bits
represented
488 Hz
0xFF
16
10
by
1.95 kHz
0xFF
10
4
EXAMPLE 10-2: PWM PERIOD AND DUTY
Desired PWM frequency is 31.25 kHz,
Fosc = 8 MHz
TMR2 prescale = 1
Find the maximum resolution of the duty cycle that can
be used with a 31.25 kHz frequency and 8 MHz oscilla-
tor:
At most, an 8-bit resolution duty cycle can be obtained
from a 31.25 kHz frequency and a 8 MHz oscillator, i.e.,
0 CCPR1L:CCP1CON<5:4> 255. Any value greater
than 255 will result in a 100% duty cycle.
In order to achieve higher resolution, the PWM fre-
quency must be decreased. In order to achieve higher
PWM frequency, the resolution must be decreased.
Table 10-2 lists example PWM frequencies and resolu-
tions for Fosc = 8 MHz. TMR2 prescaler and PR2 val-
ues are also shown.
10.3.3
The following steps should be taken when configuring
the CCP module for PWM operation:
1.
2.
3.
4.
5.
1/31.25 kHz
32 s
PR2
1/31.25 kHz
32 s
256
log(256)
8.0
Set the PWM period by writing to the PR2 regis-
ter.
Set the PWM duty cycle by writing to the
CCPR1L register and CCP1CON<5:4> bits.
Make the CCP1 pin an output by clearing the
TRISC<2> bit.
Set the TMR2 prescale value and enable Timer2
by writing to T2CON.
Configure the CCP module for PWM operation.
7.81 kHz
0xFF
SET-UP FOR PWM OPERATION
10
1
31.25 kHz
= [ (PR2) + 1 ] • 4 • 1/8 MHz • 1
= [ (PR2) + 1 ] • 4 • 125 ns • 1
= 63
= 2
= 2
= 2
= (PWM Resolution) • log(2)
= PWM Resolution
CYCLE CALCULATION
0x3F
PWM RESOLUTION
PWM RESOLUTION
PWM RESOLUTION
1
8
1997 Microchip Technology Inc.
62.5 kHz
0x1F
• 1/8 MHz • 1
• 125 ns • 1
1
7
250 kHz
0x07
1
5